• 제목/요약/키워드: overhead reduction

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Wind-Resistant Safety Reviews of Traffic Signal Structures by Wind Tunnel Tests (풍동실험을 통한 교통신호 구조물의 내풍 안전성 검토)

  • Taik-Nyung Huh
    • Journal of the Korean Society of Industry Convergence
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    • v.27 no.4_2
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    • pp.833-840
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    • 2024
  • According to recent data from the Korea Meteorological Administration(KMA), the frequency of typhoons around the Korea Peninsula is almost unchanged, but the intensity is on the rise due to climate change. A typhoon that has become so powerful can cause partial or complete damage to the traffic signal structures, limiting the operation of the vehicle and causing traffic congestion. If the traffic signal structure fails to function properly due to the influence of the typhoon, not only the v ehicle operation will be disrupted, but also direct damage to the traffic signal structure will occur. In addition, if the social overhead cost of traffic congestion is included, the recovery cost caused by the typhoon will increase to an extent that it is difficult to estimate. Therefore, in this study, a wind tunnel experiment was performed by producing a wind tunnel model of an existing fixed traffic signal structure and a traffic signal structure in which signs and traffic lights are hinged. Also, The fixed and hinge structures were modeled as 3D finite elements, and wind-resistant analysis was performed by wind speed, and, wind-resistant safety of traffic signal structures were analyzed and examined through wind-resistant analyses. From the comparative analysis of the results of experiment and FE analysis, it was known that the stress reduction rate of the hinge connection structure was at least 30% compared to that of the fixed connection structure from the results of the wind tunnel experiment and FE analysis. And As a result of finite element analysis for the maximum design wind speed of 50m/s, it was found that the maximum stress generated in the existing structure exceeded all the yield stress, but the maximum stress of the hinge connection structure was within the yield stress. Finally The hinge connection structure showed a relatively large stress reduction rate as the wind speed increased and the length of the lateral beam was shorter at the same wind speed.

Entropy Coders Based on Binary Forword Classification for Image Compression (영상 압축을 위한 이진 순방향 분류 기반 엔트로피 부호기)

  • Yoo, Hoon;Jeong, Je-Chang
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.4B
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    • pp.755-762
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    • 2000
  • Entropy coders as a noiseless compression method are widely used as end-point compression for images so there have been many contributions to increase of entropy coder performance and to reduction of entropy coder complexity. In this paper, we propose some entropy coders based on binary forward classification (BFC). BFC requires overhead of classification but there is no change between the amount of input information and that of classified output information, which we prove this property in this paper. And using the proved property, we propose entropy coders which are Golomb-Rice coder after BFC (BFC+GR) and arithmetic coder with BFC(BFC+A). The proposed entropy decoders do not have further complexity Son BFC. Simulation results also show better performance than other entropy coders which have similar complexity to proposed coders.

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A study on the Unbalanced Insulation of the Double Circuit 154 kV Transmission Lines to Reduce Lightning Failure Rate (뇌사고율 저감을 위한 154 kV 송전선의 차등절연 적용 방안 연구)

  • Kwak, J.S.;Kang, Y.W.;Woo, J.W.;Shim, E.B.;Kim, W.G.
    • Proceedings of the KIEE Conference
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    • 2003.10a
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    • pp.151-159
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    • 2003
  • According to the records, approximately 50 percent of power failure were caused by lightning. Conventional fault preventive measures against lightning include reduction of the footing resistance of the tower, multiplication of overhead ground wires and unbalanced insulation of the double circuit transmission tower. In addition to these, transmission line arresters have been recently appeared as an alternatives. In this paper an unbalanced insulation method with transmission line arrester was assumed as another countermeasure against simultaneous double circuit trip of 154 kV transmission line by lightning strike. The lightning performance of line arrester was compared with conventional insulation concept using different numbers of porcelain and glass insulator. Larger numbers of insulator simply increase flashover current level by lightning but the lightning performance doesn't proportional to it. EMTP simulation and predictive calculation of lightning failure rate were carried out to evaluate the performance.

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TPC-BS: Transmission Power Control based on Binary Search in the Wireless Sensor Networks (TPC-BS: 센서 네트워크에서 이진검색 방법을 이용한 빠른 전송전력 결정 방법)

  • Oh, Seung-Hyun
    • Journal of Korea Multimedia Society
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    • v.14 no.11
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    • pp.1420-1430
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    • 2011
  • This paper proposes a new method to optimize energy consumption in a wireless modem by setting up a transmission power value according to the distance between nodes and circumstance in the MAC layer of IEEE 802.15.4. The proposed method can dynamically find an optimal transmission power range using the binary search scheme and minimize overhead caused by multiple message transmissions when determining the optimal transmission power. The determined transmission power is used for transmitting data packets and can be modified dynamically depending on the changes in a network environment when exchanging data packets and acknowledgement signals. The results of the simulations show 30% reduction in energy consumption while 2.5 times increase in data transmission rate per unit of energy comparing with IEEE 802.15.4 standard.

Efficient Management of PCM-based Swap Systems with a Small Page Size

  • Park, Yunjoo;Bahn, Hyokyung
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.5
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    • pp.476-484
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    • 2015
  • Due to the recent advances in non-volatile memory technologies such as PCM, a new memory hierarchy of computer systems is expected to appear. In this paper, we explore the performance of PCM-based swap systems and discuss how this system can be managed efficiently. Specifically, we introduce three management techniques. First, we show that the page fault handling time can be reduced by attaching PCM on DIMM slots, thereby eliminating the software stack overhead of block I/O and the context switch time. Second, we show that it is effective to reduce the page size and turn off the read-ahead option under the PCM swap system where the page fault handling time is sufficiently small. Third, we show that the performance is not degraded even with a small DRAM memory under a PCM swap device; this leads to the reduction of DRAM's energy consumption significantly compared to HDD-based swap systems. We expect that the result of this paper will lead to the transition of the legacy swap system structure of "large memory - slow swap" to a new paradigm of "small memory - fast swap."

Structure of Edge Routers for Seamless Connection in MPOA/MPLS Interworked Networks (MPOA/MPLS 연동망의 심리스 연결을 위한 에지 라우터 구조)

  • Kim, Dong-Ho;Lee, Soong-Hee
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.38 no.10
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    • pp.10-17
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    • 2001
  • For high-speed Internet services, considerations on interworking methods are required for interworking between networks with different technologies. lnterworking and structures in interworking point nodes can affect on transfer efficiency. This paper proposes interworking procedures and functions of the edge routers for overhead reduction in MPOA-MPLS networks. The MPLS networks can be based on ATM technology. Therefore, we consider ATM seamless connections for the interworking and compare the proposed method with that without seamless connection. We perform computer simulations to get both of the transfer delays and throughputs for the comparison., we describe required interworking functions and operations in the edge routers.

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A Study on the Design of Testable CAM using MTA Code (MTA 코드를 적용한 Testable CAM 설계에 관한 연구)

  • 정장원;박노경;문대철
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.6
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    • pp.48-55
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    • 1998
  • In this work, the testable CAM(Content Addressable Memory) is designed to perform the test effectively by inserting the ECC(Error Checking Circuit) inside the CAM. The designed CAM has the circuit which is capable of testing the functional faults in read, write, and match operations. In general the test circuit inserted causes the increase of total circuit area, Thus this work, utilizes the new MTA code to reduce the overhead of an area of the built-in test circuit which has a conventional parallel comparator. The designed circuit was verified using the VHDL simulator and the layout was performed using the 0.8${\mu}{\textrm}{m}$ double metal CMOS process. About 30% reduction of a circuit area wad achieved in the proposed CAM using the XOR circuit

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A New Reduction Method of the Uplink Information for an Adaptive Modulation and Coding OFDM/FDD System (다중 사용자를 위한 적응형 OFDM/FDD 시스템의 상향링크 정보 축소 방안)

  • 장일순;유병한;조경록
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.2A
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    • pp.140-146
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    • 2004
  • In this paper we proposed the reducing method of feedback information for transmitting of adaptable data rate in multi-user OFDMA/FDD systems. In order to transmit downlink channel information to Base-Station(BS) through the limited uplink control channel, the proposed algorithm exploits the channel variation level which describes the similarity among the adjacent clusters and uses just one modulation and coding scheme(MCS) level representing channel information of all clusters'. We investigated the performance in single cell environment. It has a similar overhead for feedback information with conventional algorithm and has better performance in that bandwidth efficiency and outage probability than the conventional algorithms.

A Study on application of Trapezoidal Steel Box Tunnelling Method (지중압입체를 이용한 지하구조물 축조방법의 적용성 연구)

  • Jun, Sung Bai
    • Journal of the Society of Disaster Information
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    • v.4 no.2
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    • pp.138-154
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    • 2008
  • The conventional non-dig underground structure building method which made an appearance to reduce the social and environmental costs and maximize the efficiency of the social overhead capital facilities could not help being uneconomical because of many problems such as unnecessary excessive excavation, water leakage, obstacle interference, difficulty of curvilinear application and connection complexity between propelled and injected bodies due to indiscriminate application of small and large circular steel pipes without consideration of the site conditions. The T.S.T.M, in which a protruded square tube is applied as a propulsion and injection body in a design that considered site conditions such as ground condition, depth of soil and live load, was able to be economical as it solved the problems of water resistance, minimization of obstacle interference and curvilinearity, and we can see that it can be applied to all grounds by utilizing or complementing the target ground in terms of engineering. Also in configuring the transverse section, it is possible to not only secure excellent structural safety but also implement all of the above engineering characteristics not only in the square cross section but also in the arch cross section, so it was possible to build structures on any section or ground, and we could confirm the LCC reduction effect and the VE effect.

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Design of Low-error Fixed-width Modified Booth Multiplier Using Booth Encoder Outputs (Booth 인코더 출력을 이용한 저오차 고정길이 modified Booth 곱셈기 설계)

  • 조경주;김원관;정진균
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.2C
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    • pp.298-305
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    • 2004
  • This paper presents an error compensation method for a fixed-width modified Booth multiplier that receives a W-bit input and produces a W-bit product. To efficiently compensate for the quantization error, Booth encoder outputs (not multiplier coefficients) are used for the generation of error compensation bias. The truncated bits are divided into two groups depending upon their effects on the quantization error. Then, different error compensation methods are applied to each group. By simulations, it is shown that quantization error can be reduced up to 50% by the proposed error compensation method compared with the existing method with approximately the same hardware overhead in the bias generation circuit. It is also shown that the proposed method leads to up to 40% reduction in area and power consumption of a multiplier compared with the ideal multiplier.