• Title/Summary/Keyword: organic thin film transistors (TFTs)

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Characteristics of Self assembled Monolayer as $Ta_2O_5$ Dielectric Interface for Polymer TFTs (중합 박막 트랜지스터를 위한 $Ta_2O_5$ 유전체 접합의 자기조립 단분자막의 특성)

  • Choi, Kwang-Nam;Kwak, Sung-Kwan;Chung, Kwan-Soo;Kim, Dong-Sik
    • 전자공학회논문지 IE
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    • v.43 no.1
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    • pp.1-4
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    • 2006
  • The characteristics of polymeric thin-film transistors(TFTs) can be controlled by chemically modifying the surface of the gate dielectric prior to the organic semiconductor. The chemical treatment consists of derivative the tantalum pentoxide($Ta_2O_5$) surface with organic materials to form self-assembled monolayer(SAM). The deposition of an octadecyl-trichlorosilane(OTS), hexamethy-ldisilazone(HMDS), aminopropyltreithoxysilane(ATS) SAM leads to a mobility of $0.01\sim0.06cm2/V{\cdot}s$ in a poly-3-hexylthiophene(P3HT) conjugated polymer. The mobility enhancement mechanism is likely to involve molecular interactions between the polymer and SAM. These result can be used for polymer TFT's dielectric material.

Design of Pixel Circuit for AMOLED Using Pentacene TFTs (펜타센 TFT를 이용한 AMOLED 픽셀회로 설계)

  • Ryu Gi-Seong;Choe Ki-Beom;Lee Myung-Won;Song Chung-Kun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.6 s.348
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    • pp.1-8
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    • 2006
  • In this paper, we designed a pixel circuit for AMOLED display based on organic thin film transistors and analyzed the operation with SPICE simulation. First, we theoretically designed the pixel circuit with the result of layout for fabricating $32\times32$ AMOLED panel, TFT W/L and capacitance of storage capacitor. And we simulated the designed pixel circuit using HSPICE for analyzing electrical performance. As a result of simulation, we identified the possibility of AMOLED display based on OTFTs.

Inorganic Printable Materials for Printed Electronics: TFT and Photovoltaic Application

  • Jeong, Seon-Ho;Lee, Byeong-Seok;Lee, Ji-Yun;Seo, Yeong-Hui;Kim, Ye-Na;More, Priyesh V.;Lee, Jae-Su;Jo, Ye-Jin;Choe, Yeong-Min;Ryu, Byeong-Hwan
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2011.05a
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    • pp.1.1-1.1
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    • 2011
  • Printed electronics based on the direct writing of solution processable functional materials have been of paramount interest and importance. In this talk, the synthesis of printable inorganic functional materials (conductors and semiconductors) for thin-film transistors (TFTs) and photovoltaic devices, device fabrication based on a printing technique, and specific characteristics of devices are presented. For printable conductor materials, Ag ink is designed to achieve the long-term dispersion stability and good adhesion property on a glass substrate, and Cu ink is sophisticatedly formulated to endow the oxidation stability in air and even aqueous solvent system. The both inks were successfully printed onto either polymer or glass substrate, exhibiting the superior conductivity comparable to that of bulk one. In addition, the organic thin-film transistor based on the printed metal source/drain electrode exhibits the electrical performance comparable to that of a transistor based on a vacuum deposited Au electrode. For printable amorphous oxide semiconductors (AOSs), I introduce the noble ways to resolve the critical problems, a high processing temperature above $400^{\circ}C$ and low mobility of AOSs annealed at a low temperature below $400^{\circ}C$. The dependency of TFT performances on the chemical structure of AOSs is compared and contrasted to clarify which factor should be considered to realize the low temperature annealed, high performance AOSs. For photovoltaic application, CI(G)S nanoparticle ink for solution processable high performance solar cells is presented. By overcoming the critical drawbacks of conventional solution processed CI(G)S absorber layers, the device quality dense CI(G)S layer is obtained, affording 7.3% efficiency CI(G)S photovoltaic device.

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Analysis of the Output Characteristics of IGZO TFT with Double Gate Structure (더블 게이트 구조 적용에 따른 IGZO TFT 특성 분석)

  • Kim, Ji Won;Park, Kee Chan;Kim, Yong Sang;Jeon, Jae Hong
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.33 no.4
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    • pp.281-285
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    • 2020
  • Oxide semiconductor devices have become increasingly important because of their high mobility and good uniformity. The channel length of oxide semiconductor thin film transistors (TFTs) also shrinks as the display resolution increases. It is well known that reducing the channel length of a TFT is detrimental to the current saturation because of drain-induced barrier lowering, as well as the movement of the pinch-off point. In an organic light-emitting diode (OLED), the lack of current saturation in the driving TFT creates a major problem in the control of OLED current. To obtain improved current saturation in short channels, we fabricated indium gallium zinc oxide (IGZO) TFTs with single gate and double gate structures, and evaluated the electrical characteristics of both devices. For the double gate structure, we connected the bottom gate electrode to the source electrode, so that the electric potential of the bottom gate was fixed to that of the source. We denote the double gate structure with the bottom gate fixed at the source potential as the BGFP (bottom gate with fixed potential) structure. For the BGFP TFT, the current saturation, as determined by the output characteristics, is better than that of the conventional single gate TFT. This is because the change in the source side potential barrier by the drain field has been suppressed.

ZnO Nanowires and P3HT Polymer Composite TFT Device (ZnO 나노선과 P3HT 폴리머를 이용한 유/무기 복합체 TFT 소자)

  • Moon, Kyeong-Ju;Choi, Ji-Hyuk;Kar, Jyoti Prakash;Myoung, Jae-Min
    • Korean Journal of Materials Research
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    • v.19 no.1
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    • pp.33-36
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    • 2009
  • Inorganic-organic composite thin-film-transistors (TFTs) of ZnO nanowire/Poly(3-hexylthiophene) (P3HT) were investigated by changing the nanowire densities inside the composites. Crystalline ZnO nanowires were synthesized via an aqueous solution method at a low temperature, and the nanowire densities inside the composites were controlled by changing the ultrasonifiaction time. The channel layers were prepared with composites by spin-coating at 2000 rpm, which was followed by annealing in a vacuum at $100^{\circ}C$ for 10 hours. Au/inorganic-organic composite layer/$SiO_2$ structures were fabricated and the mobility, $I_{on}/I_{off}$ ratio, and threshold voltage were then measured to analyze the electrical characteristics of the channel layer. Compared with a P3HT TFT, the electrical properties of TFT were found to be improved after increasing the nanowire density inside the composites. The mobility of the P3HT TFT was approximately $10^{-4}cm^2/V{\cdot}s$. However, the mobility of the ZnO nanowire/P3HT composite TFT was increased by two orders compared to that of the P3HT TFT. In terms of the $I_{on}/I_{off}$ ratio, the composite device showed a two-fold increase compared to that of the P3HT TFT.

Laser Thermal Processing System for Creation of Low Temperature Polycrystalline Silicon using High Power DPSS Laser and Excimer Laser

  • Kim, Doh-Hoon;Kim, Dae-Jin
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.647-650
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    • 2006
  • Low temperature polycrystalline silicon (LTPS) technology using a high power laser have been widely applied to thin film transistors (TFTs) for liquid crystal, organic light emitting diode (OLED) display, driver circuit for system on glass (SOG) and static random access memory (SRAM). Recently, the semiconductor industry is continuing its quest to create even more powerful CPU and memory chips. This requires increasing of individual device speed through the continual reduction of the minimum size of device features and increasing of device density on the chip. Moreover, the flat panel display industry also need to be brighter, with richer more vivid color, wider viewing angle, have faster video capability and be more durable at lower cost. Kornic Systems Co., Ltd. developed the $KORONA^{TM}$ LTP/GLTP series - an innovative production tool for fabricating flat panel displays and semiconductor devices - to meet these growing market demands and advance the volume production capabilities of flat panel displays and semiconductor industry. The $KORONA^{TM}\;LTP/GLTP$ series using DPSS laser and XeCl excimer laser is designed for the new generation of the wafer & FPD glass annealing processing equipment combining advanced low temperature poly-silicon (LTPS) crystallization technology and object-oriented software architecture with a semistandard graphical user interface (GUI). These leading edge systems show the superior annealing ability to the conventional other method. The $KORONA^{TM}\;LTP/GLTP$ series provides technical and economical benefits of advanced annealing solution to semiconductor and FPD production performance with an exceptional level of productivity. High throughput, low cost of ownership and optimized system efficiency brings the highest yield and lowest cost per wafer/glass on the annealing market.

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Characteristics of Schottky Barrier Thin Film Transistors (SB-TFTs) with PtSi Source/Drain on glass substrate

  • O, Jun-Seok;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.199-199
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    • 2010
  • 최근 평판 디스플레이 산업의 발전에 따라 능동행렬 액정 표시 소자 (AMOLED : Active Matrix Organic Liquid Crystral Display) 가 차세대 디스플레이 분야에서 각광을 받고있다. 기존의 TFT-LCD에 사용되는 a-Si:H는 균일도가 좋지만 전기적인 스트레스에 의해 쉽게 열화되고 낮은 이동도는 갖는 단점이 있으며, ELA (Eximer Laser Annealing) 결정화 poly-Si은 전기적인 특성은 좋지만 uniformity가 떨어지는 단점을 가지고 있어서 AMOLED 및 대면적 디스플레이에 적용하기 어렵다. 따라서 a-Si:H TFT보다 좋은 전기적인 특성을 보이며 ELA 결정화 poly-Si TFT보다 좋은 uniformity를 갖는 SPC (Solid Phase Crystallization) poly-Si TFT가 주목을 받고있다. 본 연구에서는 차세대 디스플레이 적용을 위해서 glass 기판위에 증착된 a-Si을 SPC 로 결정화 시킨 후 TFT를 제작하고 평가하였다. 또한 TFT 형성시에 저온공정을 실현하기 위해서 소스/드레인 영역에 실리사이드를 형성시켰다. 소자 제작시의 최고온도는 $500^{\circ}C$ 이하에서 공정을 진행하는 저온 공정을 실현하였다. Glass 기판위에 a-Si이 80 nm 증착된 기판을 퍼니스에서 24시간 동안 N2 분위기로 약 $600^{\circ}C$ 에서 결정화를 진행하였다. 노광공정을 통하여 Active 영역을 형성시키고 E-beam evaporator를 이용하여 약 70 nm 의 Pt를 증착시킨 후, 소스와 드레인 영역의 실리사이드 형성은 N2 분위기에서 $450^{\circ}C$, $500^{\circ}C$, $550^{\circ}C$에서 열처리를 통하여 형성하였다. 게이트 절연막은 스퍼터링을 이용하여 SiO2를 약 15 nm 의 두께로 증착하였다. 게이트 전극의 형성을 위하여 E-beam evaporator 을 이용하여 약 150 nm 두께의 알루미늄을 증착하고 노광공정을 통하여 게이트 영역을 형성 후 에 $450^{\circ}C$, H2/N2 분위기에서 약 30분 동안 forming gas annealing (FGA)을 실시하였다. 제작된 소자는 실리사이드 형성 온도에 따라서 각각 다른 특성을 보였으며 $450^{\circ}C$에서 실리사이드를 형성시킨 소자는 on currnet와 SS (Subthreshold Swing)이 가장 낮은것을 확인하였다. $500^{\circ}C$$550^{\circ}C$에서 실리사이드를 형성시킨 소자는 거의 동일한 on current와 SS값을 나타냈다. 이로써 glass 기판위의 SB-TFT 제작 시 실리사이드 형성의 최적온도는 $500^{\circ}C$로 생각되어 진다. 위의 결과를 토대로 본 연구에서는 SPC 결정화 방법을 이용하여 SB-TFT를 성공적으로 제작 및 평가하였고, 차세대 디스플레이에 적용할 경우 우수한 특성이 기대된다.

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