• Title/Summary/Keyword: open circuit

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Implementation of the high efficiency buck converter using the resonant circuit (공진회로를 이용한 고효율 Buc 컨버터의 구현)

  • 임승하;사공석진
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.33B no.11
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    • pp.167-174
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    • 1996
  • For the decreasing of switching loss, this paper designs the improved buck converter circuit and then compare with the conventional buck converter and finally analyzes the performance. When the switch is turn-off, in the buck converter using the smoothing capacitor, the flow of transient current and peak voltage having the high frequency components was generated because of the instantaneous open-state in the teminals of the switch. However, the buck converter presented in this paper eliminated this disadvantage by using the L-C circuit. Therefore, the higher PF in 0.85 is achieved than that of the buck converter using the smoothing capacitor. Also, due to the decreasing of the harmonic contain rate, the current usage rate is to be higher than that of the conventional buck converter by 4.48dB and the output voltage varient rate for the step response is to be lower 1.32 times than that of the conventional buck converter.

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The efficiency charateristics of intrinsic layer thickness dependence for amorphous silicon single junction solar cells (Intrinsic layer 두께 가변에 따른 단일접합 비정질 박막 태양전지의 효율 특성 변화)

  • Yoon, Ki-Chan;Kim, Young-Kook;Heo, Jong-Kyu;Choi, Hyung-Wook;Yi, Young-Suk;Yi, Jun-Sin
    • 한국신재생에너지학회:학술대회논문집
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    • 2009.06a
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    • pp.80-82
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    • 2009
  • The dependence of the efficiency characteristics of hydrogenated amorphous silicon single junction solar cells on the various intrinsic layer thickness has been investigate in the glass/$SnO_2$:F/p,i,n a-Si:H/Al type of amorphous silicon solar cells by cluster PECVD system. The open circuit voltage, short circuit current, fill factor and conversion efficiency have been measured under AM 1.5 condition. The result of the cell performance was improved about 8.2% due to an increase in the short circuit current.

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A Study on the Elimination of Temporary overvoltage Due to Ferroresonance at Gas Insulated Switchgear (Gas 색연(絶綠) 개폐장치(開閉裝置)의 철공진(鐵共振) 제어대책(制御對策)에 관한 연구(硏究))

  • Kim, S.K.;Kim, T.S.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.05b
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    • pp.216-221
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    • 2000
  • This paper describes the analysis results on the PT ferroresonance at 154 kV GIS (gas Insulated substation by EMTP(Electro- magnetic Transient Program). We had simulated the PT ferroresonance between a potential transformer(PT) and an open circuit breaker's grading capacitance. The ferroresonance leads to very large power frequency overvoltages on PT bus and subsequent insulation failure. The large power can be supplied to the PT by the high voltage on the opened circuit due to the grading capacitance and equivalent capacitance of the buses during the ferroresonance. The damping circuit connected on the secondary winding were considered in the model. The actual countermeasure include a saturable inductor and a resistor series-mounted, but the 2 ohms of damping resistance was used in the computationl model.

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Methods for Increasing the Interrupting Performance by Changing the Shape of Are Chamber in Molded Case Circuit Breaker (배선용 차단기의 소호부의 형상 변화를 통한 차단 성능 향상 방법)

  • Cho, Sung-Hoon;Lee, Han-Ju;Yoon, Jae-Hun;Lim, Kee-Joe;Kang, Seong-Hwa
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.03b
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    • pp.28-28
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    • 2010
  • The higher the short circuit currents, the faster the interruption takes place. For increasing the interrupting performance of the MCCB, it is important to design optimally the adjustable tripping device, the open /shut mechanism, and the arc quenching room in the MCCB. This paper is focused on understanding the interrupting performance, more specifically of the grid and the fix contact, based on the shape of the arc quenching room in the current MCCB.

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Dynamic Analysis and Control Design of Current-Mode Controlled Active-Clamp Forward-Flyback Converter (전류제어 능동 클램프 포워드-플라이백 컨버터의 동특성 해석 및 제어회로 설계)

  • Lim, Won-Seok;Kang, Young-Han;Choi, Byung-Cho
    • Proceedings of the KIPE Conference
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    • 2002.07a
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    • pp.374-377
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    • 2002
  • This paper presents dynamic analyses and control design of the current-mode controlled active-clamp forward-flyback converter. The circuit averaging technique is used to extract the small-signal circuit model for the power stage From the small-signal circuit model of the power stage, the open-loop transfer functions are derived and used for the compensation design. The analysis results are verified using an experimental converter that delivers a 3.3V/10A output from a $40\~60V$ input source.

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A analysis result on the PT ferroresonance at 154 kV GIS substation (154 kV GIS의 PT 철공진 소손사례와 원인규명)

  • Woo, J.W.;Shim, E.B.;Kim, S.K.
    • Proceedings of the KIEE Conference
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    • 1999.07e
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    • pp.2076-2079
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    • 1999
  • This paper describes the analysis results on the PT ferroresonance at 154 kV GIS (gas Insulated substation by EMTP (Electro-magnetic Transient Program). We had simulated the PT ferroresonance between a potential transformer(PT) and an open circuit breaker's grading capacitance. The ferroresonance leads to very large power frequency overvoltages on PT bus and subsequent insulation failure. The large power can be supplied to the PT by the high voltage on the opened circuit due to the grading capacitance and equivalent capacitance of the buses during the ferroresonance. The damping circuit connected on the secondary winding were considered in the model. The actual countermeasure include a saturable inductor and a resistor series-mounted, but the 2 ohms of damping resistance was used in the computational model.

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Novel Fabrication of Platinum Counter Electrode in Dye-sensitized Solar Cells Using Nano-second Pulsed Laser Sintering

  • Lee, Jin Ah;Yoo, Kicheon;Kim, Woong;Ko, Min Jae
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.234-234
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    • 2013
  • The counter electrodes in dye-sensitized solar cells (DSSCs) play roles in not only collecting electrons from external circuit but also reducing I3- to I- in electrolytes. Generally, conventional counter electrodes for DSSCs are prepared from the high temperature treatment of the H2PtCl6 precursor solution at $400^{\circ}C$ However, the more simplified fabrication process of counter electrodes is required for the commercialization of DSSCs. In this work, we developed novel fabrication process of counter electrodes using nano-second pulsed laser. DSSCs employing counter electrodes prepared by laser process showed conversion efficiency of 6.75% with short-circuit current of 12.73 mA/cm2, open-circuit voltage of 0.74 V and fill factor of 0.72. Closer investigating of photovoltaic properties will be reported.

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Methods to Improve Light Harvesting Efficiency in Dye-Sensitized Solar Cells

  • Park, Nam-Gyu
    • Journal of Electrochemical Science and Technology
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    • v.1 no.2
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    • pp.69-74
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    • 2010
  • Methodologies to improve photovoltaic performance of dye-sensitized solar cell (DSSC) are reviewed. DSSC is usually composed of a dye-adsorbed $TiO_2$ photoanode, a tri-iodide/iodide redox electrolyte and a Pt counter electrode. Among the photovoltaic parameters of short-circuit photocurrent density, open-circuit voltage and fill factor, short-circuit photocurrent density is the collective measure of light harvesting, charge separation and charge collection efficiencies. Internal quantum efficiency is known to reach almost 100%, which indicates that charge separation occurs without loss by recombination. Thus, light harvesting efficiency plays an important role in improvement of photocurrent. In this paper, technologies to improve light harvesting efficiency, including surface area improvement by nano-dispersion, size-dependent light scattering efficiency, bi-functional nano material, panchromatic absorption by selective positioning of three different dyes and transparent conductive oxide (TCO)-less DSSC, are introduced.

Single Phase Power Circuit Analysis of a Series Voltage Compensator (직렬형 전압보상기의 단상 전력회로 해석)

  • Lim, Yong-Bin;Lim, Su-Saeng;Lee, Eun-Woong;Kim, Hong-Kwon
    • Proceedings of the KIEE Conference
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    • 1999.07a
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    • pp.302-304
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    • 1999
  • Voltage sag and swell are the most severe factors affecting power quality in distribution systems. This paper discusses an approach to ensure a high quality power supply to critical loads appling voltage-sag compensator. The proposed system consists of a PWM voltage source inverter, connected in series with the line through a single-phase transformer. The operation Principle and Power circuit configuration of the proposed voltage sag compensator are introduced. And then the transfer function of compensator is derived from simplified single phase power circuit, and simulated so that the benefits of this proposed compensator is confirmed through the open loop response.

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Design of a Built-in Current Sensor for Current Testing Method in CMOS VLSI (CMOS 회로의 전류 테스팅를 위한 내장형 전류감지기 설계)

  • 김강철;한석붕
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.32B no.11
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    • pp.1434-1444
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    • 1995
  • Current test has recently been known to be a promising testing method in CMOS VLSI because conventional voltage test can not make sure of the complete detection of bridging, gate-oxide shorts, stuck-open faults and etc. This paper presents a new BIC(built-in current sensor) for the internal current test in CMOS logic circuit. A single phase clock is used in the BIC to reduce the control circuitry of it and to perform a self- testing for a faulty current. The BIC is designed to detect the faulty current at the end of the clock period, so that it can test the CUT(circuit under test) with much longer critical propagation delay time and larger area than conventional BICs. The circuit is composed of 18 devices and verified by using the SPICE simulator.

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