• ETRI Journal
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• v.28 no.3
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• pp.383-385
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• 2006

A new meander-line antenna consisting of two open-ended strips is proposed for a compact and broadband UHF radio frequency identification tag. An equivalent circuit model for the proposed antenna is derived and used to perform a simple and wideband impedance match to an arbitrary complex impedance of a tag chip without any additional matching network. The performance of the proposed antenna is validated by comparing calculated and measured results, which show good agreement.

• Journal of Industrial Technology
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• v.27 no.B
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• pp.153-160
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• 2007

In this paper, the exact analysis of the parallel coupled line with open stub is presented. This structure shows LPF characteristics with broad stopband and sharp skirt characteristics. We derived the exact Z-matrix expression of the structure. In order to show the validation of the expression we designed $3^{th}$ order Chebyshev LPF using the structure. The simulated data excellently agreed with the predicted values by the calculation using the derived expression.

• Proceedings of the KIEE Conference
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• 1985.07a
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• pp.26-28
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• 1985

The open delta circuit of the power transformer is still often applied, in spite of its reduced utilization of the power. In this paper, a new approach to the calculation of the power and its distribution in each transformer component is presented. For the power evaluation, the method of the complex power analysis is applied.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.3
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• pp.401-417
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• 1994

In this paper, a new testable design technique for domino CMOS circuits is proposed to detect stuck-at(s-at), stuck-open(s-op) and stuck-on(s-on) faults in the circuits by observing logic test reponses. The proposed technique adds one pMOS transistor per domino CMOS gate for s-op and s-on faults testing of nMOS transistors and one nMOS transistors and one nMOS transistor per domino gate or multilevel circuit to detect s-on faults in pMOS transistors of inverters in the circuit. The extra transistors enable the proposed testable circuit to operate like a pseudo static nMOS circuit while testing nMOS transistors in domino CMOS circuits. Therefore, the two=phase operation of a precharge phase and a evaluation phase is not needed to keep the domino CMOS circuit from malfunctionong due to circuit delays in the test mode, which reduces the testing time and the complexity of test generation. Most faults of th transistors in the proposed testable domino CMOS circuit can be detected by single test patterns. The use of single test patterns makes the testing of the proposed testable domino CMOS circuit free from path delays, timing skews, chage sharing and glitches. In the proposed design, the testing of the faults which, require test sequences also becomes free from test invalidation. The conventional automatic test pattern generators(ATPG) can be used for generating test patterns to detect faults in the circuits.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.9
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• pp.26-34
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• 1998

This paper presents a characterization method for faults of circuit patterns on MCM(Multichip Module) or PCB(Printed Circuit Board) substrates with electron beams of a SEM(Scanning Electron Microscope) by inducing voltage contrast on the signal line. The experimentation employes dual potential electron beams for the fault characterization of circuit patterns with a commercial SEM without modifying its structure. The testing procedure utilizes only one electron gun for the generation of dual potential electron beams by two different accelerating voltages, one for charging electron beam which introduces the yield of secondary electron $\delta$ < 1 and the other for reading beam which introduces $\delta$ > 1. Reading beam can read open's/short's of a specific net among many test nets, simultaneously discharging during the reading process for the next step, by removing its voltage contrast. The experimental results of testing the copper signal lines on glass-epoxy substrates showed that the state of open's/short's had generated the brightness contrast due to the voltage contrast on the surface of copper conductor line, when the net had charged with charging electron beams of 7KV accelerating voltages and then read with scanning reading electron beams of 2KV accelerating voltages in 10 seconds. The experimental results with Au pads of a IC die and Au plated Cu pads of BGA substrates provided the simple test method of circuit lines with 7KV charging electron beam and 2KV reading beam. Thus the characterization method showed that we can test open and short circuits of the net nondestructively by using dual potential electron beams with one SEM gun.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.9
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• pp.1317-1320
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• 2014

In case of using three-phase induction motor in three-phase power system, if he deficiency happens in phase among three-phase, the motor will drive in an open phase state. As to the motor, the continuing operation is possible then, but the phenomenon that the power supply stops happening by the result of the overload electricity order on the healthy phase of two phases with a damage and activating the circuit breaker. Consequently, in order to overcome this problem in treatise accordingly. I propose an uninterruptible power supply which is able to prevent that the over current on the health phase through the restoration that in case happening open phase on the power line when driving the motor. Also, it is possible to supply power consecutively without interruption of electric power and we proved the performance and reliability through an experiment.

• ETRI Journal
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• v.23 no.2
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• pp.77-84
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• 2001

The detection of open defects in CMOS SRAM has been a time consuming process. This paper proposes a new dynamic power supply current testing method to detect open defects in CMOS SRAM cells. By monitoring a dynamic current pulse during a transition write operation or a read operation, open defects can be detected. In order to measure the dynamic power supply current pulse, a current monitoring circuit with low hardware overhead is developed. Using the sensor, the new testing method does not require any additional test sequence. The results show that the new test method is very efficient compared with other testing methods. Therefore, the new testing method is very attractive.

• International Journal of Reliability and Applications
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• v.4 no.2
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• pp.51-56
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• 2003

A k-out-of-n system with n identical and independent components is considered in which the components takes two types of function: 0 (open-circuit) or 1 (closed) on command (e.g. electromagnetic relays and solid state switches). Components are subject to two types of failure on command: failure to close or failure to open. In our k-out-of-n system, failure of (n-k)＋1 or more components to close causes to the close failure of the system, or failure of k or more components to open causes the open failure of the system. The long-run average cost rate is obtained. We find the optimal k minimizing the long run average cost rate for given n. A numerical example is presented.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.52 no.9
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• pp.468-474
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• 2003

This paper describes the development of an open frame type high power density switching converter. It is based on the active clamp forward converter with synchronous rectifier, and packaged by using the open frame and multi-layer printed circuit board (PCB) technology to achieve the higher power density. Furthermore, the windings of transformer and inductor are also realized by multi-layer PCB so that it also contributes to achieve higher power density. Through the experiment on the prototype converter of 50[W], it is confirmed that power density of 50[W/i$n_3$] and maximum efficiency of over 91[%] are obtained.

• Journal of Power Electronics
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• v.10 no.6
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• pp.702-708
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• 2010

In this paper, a fault diagnosis algorithm for brushless DC (BLDC) motor drives is proposed to maintain control performance under switch open-damage. The proposed fault diagnosis algorithm consists of a simple algorithm using measured phase current information and it detects open-circuit faults based on the operating characteristic of BLDC motors. The proposed algorithm quickly recovers control performance due to its short detection time and its reconfiguration of the system topology. It can be embedded into existing BLDC drive software as a subroutine without additional sensors. The feasibility of the proposed fault diagnosis algorithm is proven by simulation and experimental results.