• Journal of the Institute of Convergence Signal Processing
• /
• v.4 no.2
• /
• pp.61-69
• /
• 2003

In this paper, we developed the U parameter test system which inspects the property of DC parameter for semiconductor products. The developed system is interfaced by IBM-PC. It is consisted of CPLD part, ADC (Analogue to Digital Converter), DAC (Digital to Analogue Converter), voltage/current source, variable resistor and measurement part. In the proposed system, we have designed the constant voltage source and the constant current source in a part. The CPLD part is designed by VHBL, which it generates the control and converts the serial data to parallel data. The proposed system has two test channels and it operates VFCS mode and CFVS mode. The range of test voltage is from 0[V] to 100[V], and the range of test current is from 0[mA] to 100[mA)]. The diode is tested. The test results have a good performance.

• Transactions on Electrical and Electronic Materials
• /
• v.7 no.1
• /
• pp.7-11
• /
• 2006

The changes of the electrical conductivity in chalcogenide amorphous semiconductors, $Ge_{1}Se_{1}Te_{2}$, have been studied. A phase change random access memory (PRAM) device without an access transistor is successfully fabricated with the $Ge_{1}Se_{1}Te_{2}$-phase-change resistor, which has much higher electrical resistivity than $Ge_{2}Sb_{2}Te_{5}$ and its electric resistivity can be varied by the factor of $10^5$ times, relating with the degree of crystallization. 100 nm thick $Ge_{1}Se_{1}Te_{2}$ thin film was formed by vacuum deposition at $1.5{\times}10^{-5}$ Torr. The static mode switching (DC test) is tested for the $100\;{\mu}m-sized$ $Ge_{1}Se_{1}Te_{2}$ PRAM device. In the first sweep, the amorphous $Ge_{1}Se_{1}Te_{2}$ thin film showed a high resistance state at low voltage region. However, when it reached to the threshold voltage, $V_{th}$, the electrical resistance of device was drastically reduced through the formation of an electrically conducting path. The pulsed mode switching of the $20{\mu}m-sized$ $Ge_{1}Se_{1}Te_{2}$ PRAM device showed that the reset of device was done with a 80 ns-8.6 V pulse and the set of device was done with a 200 ns-4.3 V pulse.

• IEIE Transactions on Smart Processing and Computing
• /
• v.5 no.1
• /
• pp.35-42
• /
• 2016

Developments in power electronics have enabled the widespread application of Pulse Width Modulation (PWM) inverters, notably for connecting renewable systems to the grid. This study demonstrates that a high-quality power can be achieved using a stand-alone inverter, whereby the comparison between the power quality of the stand-alone inverter with battery storage (off-grid) and the power quality of the utility network is presented. Multi-loop control techniques for a single phase stand-alone inverter are used. A capacitor current control is used to give active damping and enhance the transient and steady state inverter performance. A capacitor current control is cheaper than the inductor current control, where a small current sensing resistor is used. The output voltage control is used to improve the system performance and also control the output voltage. The inner control loop uses a proportional gain current controller and the outer loop is implemented using internal model control proportional-integral-derivative to ensure stability. The optimal controls are achieved by using the Sisotool tool in MATLAB/Simulink. The outcome of the control scheme of the numerical model of the stand-alone inverter has a smooth and good dynamic performance, but also a strong robustness to load variations. The numerical model of the stand-alone inverter and its power quality are presented, and the power quality is shown to meet the IEEE 519-2014. Furthermore, the power quality of the off-grid system is measured experimentally and compared with the grid power, showing power quality of off-grid system to be better than that of the utility network.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.23 no.5
• /
• pp.1310-1318
• /
• 1998

Sigma-delta converter is frequently used for conyerting low-frequency anglog to digital signal. The converter consists of a modulator and a digital filer, but our work is concentrated on the modulator. In this works, to design second-order sigma-dalta modulator with 14bit resolution, we define maximumerror limits of each components (operational smplifier, integrator, internal ADC, and DAC) of modulator. It is first performed modeling of an ideal second-order sigma-delta modulator. This is then modified by adding the non-ideal factors such as limit of op-amp output swing, the finit DC gain of op-amp slew rate, the integrator gian error by the capacitor mismatch, the ADC error by the cmparator offset and the mismatch of resistor string, and the non-linear of DAC. From this modeling, as it is determined the specification of each devices requeired in design and the fabrication error limits, we can see the final performance of modulator.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.24 no.5
• /
• pp.422-426
• /
• 2011

Piezoelectric materials can be used to convert mechanical energy into electrical energy. In this study, we investigated the possibility of harvesting from mechanical vibration force using a high efficient piezoelectric material-polyvinylidene fluoride (PVDF). A piezoelectric energy harvesting system consists of rectifier, filter capacitor, resistance. The experiments were carried out with impacting force to PVDF film with the thickness of 1 ${\mu}m$. The output power was measured with change in the load resistance value from 100 ${\Omega}$ to 2.2 $M{\Omega}$. The highest power was obtained under optimization by selection of suitable resistive load and capacitance. A power of 0.3082 ${\mu}W/mm^2$ was generated at the external vibration force of 5 N (10 Hz) across a 1 $M{\Omega}$ optimal resistor. Also, the maximum power of 0.345 ${\mu}W/mm^2$ was generated at 22 ${\mu}F$ and 1 $M{\Omega}$. The developed system was expected at a solution to overcome the critical problem of making up small size energy harvester.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.24 no.1
• /
• pp.112-116
• /
• 2010

As one of the countermeasures to improve the recovery characteristics of the SFCL (superconducting fault current limiter), the method using the trigger of high-TC superconducting element (HTSC) when the quench in the HTSC element occurred was proposed. To confirm the suggested method, the control circuit to detect the quench occurrence of HTSC element in case of the fault occurrence was designed and the current limiting and recovery experiments of the SFCL using the designed control circuit were performed. Through the analysis for the experimental results, the points of both the open time and the closing time of a power switch comprising the control circuit could be adjusted by the resistance amplitude of a normal conducting current limiting resistor (CLR) and the recovery characteristics of the SFCL together with the current limiting operation could be confirmed to be improved by using the control circuit.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.7 no.4
• /
• pp.616-624
• /
• 2006

In this paper, the transfer characteristics of high frequency transmission line having defected ground structure (DGS) and lumped elements are described. When a DGS, which is a kind of periodic structure, is inserted into a transmission line, its equivalent inductance and capacitance elements are added to the characteristics of the standard transmission line. This generates resonance, 3dB cut-off frequency, low-pass, band rejection, and band pass characteristics, and causes a slow-wave and enlarged electrical length of the transmission line. In addition, if the DGS is combined by a lumped element such as resistor, capacitor, and inductor, the resonant and cut-off frequencies moves up or down and other changes occur in the transmission characteristics. The variation of the transmission characteristics is described with the qualitative prediction and measured data.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.5 no.1
• /
• pp.166-172
• /
• 2001

A RF wideband receiver for INMARSAT-B satellite communications system was composed of low noise amplifier and high gain amplifier, The low noise amplifier used to the resistive decoupling circuit for input impedance matching and self-bias circuits for low noise. The high gain amplifier consists of matched amplifier type to improve receiver gain. The active bias circuit can be used to provide temperature stability without requiring the large voltage drop or relatively high-dissipated power needed with a bias stabilization resistor. The bandpass filter was used to reduce a spurious level. As a result, the characteristics of the receiver implemented here show more than 60 dB in gain and less than 1.8:1 in input and output voltage standing wave ratio(VSWR), especially the carrier to noise ratio which is input signal level -126.7 dB m at 1537.5 MHz is a 45.23 dB /Hz at a 1.02 kHz.

• Journal of Power Electronics
• /
• v.18 no.2
• /
• pp.482-491
• /
• 2018

The practical design methodology of a three-phase dual active bridge (3ph-DAB) converter applied to low voltage direct current (LVDC) applications is proposed by using a mathematical model based on the steady-state operation. An analysis of the small-signal model (SSM) is important for the design of a proper controller to improve the stability and dynamics of the converter. The proposed lead-lag controller for the 3ph-DAB converter is designed with a simplified SSM analysis including an equivalent series resistor (ESR) for the output capacitor. The proposed controller can compensate the effects of the ESR zero of the output capacitor in the control-to-output voltage transfer function that can cause high-frequency noises. In addition, the performance of the power converter can be improved by using a controller designed by a SSM analysis without additional cost. The accuracy of the simplified SSM including the ESR zero of the output capacitor is verified by simulation software (PSIM). The design methodology of the 3ph-DAB converter and the performance of the proposed controller are verified by experimental results obtained with a 5-kW prototype 3ph-DAB converter.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.49 no.12
• /
• pp.194-200
• /
• 2012

In this paper, we proposed a SPICE model of high-voltage insulated gate bipolar transistor(IGBT). The proposed model consists of two sub-devices, a MOSFET and a BJT. Basic I-V characteristics and their temperature dependency were realized by adjusting various parameters of the MOSFET and the BJT. To model nonlinear parasitic capacitances such as a reverse-transfer capacitance, multiple junction diodes, ideal voltage and current amplifiers, a voltage-controlled resistor, and passive devices were added in the model. The accuracy of the proposed model was verified by comparing the simulation results with the experimental results of a 1200V trench gate IGBT.