• Proceedings of the KIEE Conference
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• 2004.07c
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• pp.1591-1593
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• 2004

압력센서는 몇 가지 센싱 메카니즘을 가지고 있으므로 종류가 다양하고 크기 변에서도 여러 가지가 이용되고 있다. 최근에는 센싱 부분이 작으며 제어부분도 포함되는 ASIC화된 센서 시스템이 개발되고 있다. 여기에 이용되는 대부분의 탄성물질은 힘을 받았을 때 물질 내부의 벌크에서 저항 값이 변화하는 특성을 갖고 있다. 이러한 특성은 피에조 저항률(piezoresistivity)로 언급되며 스트레인 게이지의 감도에 영향을 주는 중요한 요소로 작용한다. 다이어프램으로 금속대선 세라믹을 사용하면 안정성이 우수한 특정을 가칠 수 있으며, 부식성 가스 류 및 화학성분에 대해서 내성이 강하고 환경변화에 따른 변형과 공정의 단순화 등 우수한 특성을 갖고 있는 것이 큰 장점이다. 센싱부는 산화 루세니움($RuO_2$)을 주 성분으로 하는 분말을 Paste화 하여 다이어프램 위에 스크린 프린팅을 하여 기본성능을 나타내었으며 특히, 상품화에서 중요한 일반성능에서는 온도 특성에 대한 Span 과 Offset 그리고 공정의 단순화에 대해서 고찰을 하였다.

• Proceedings of the KAIS Fall Conference
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• 2010.11a
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• pp.225-227
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• 2010

본 논문은 OFDM 방식의 고속 광대역 모뎀의 주파수 오프셋을 추정하고 보상하는 알고리즘에 관한 것이다. 설계된 주파수 오프셋 추정 및 보상 알고리즘은 프리앰블 구간에서 초기 CFO(carrier frequency offset)를 추정 및 보상하고, 데이터 전송구간에도 잔류 CFO를 추정하고 보상하도록 동작한다. 초기 CFO보상은 시간축에서 동작하고, 잔류 CFO 보상은 FEQ 뒤에서 파일럿 캐리어의 정보를 이용하여 이루어진다. 잔류 주파수 오프셋을 보상할 때에는 ADC/DAC의 SFO(sampling frequency offset)도 추정하여 잔류 CFO와 동시에 보상하게 된다.

• Proceedings of the Acoustical Society of Korea Conference
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• 1998.06e
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• pp.177-180
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• 1998

높은 Q가 요구되는 고주파 신호 처리용 필터 설계에서는 흔히 SC 필터를 사용하고 있다. 처리하고자 하는 신호가 고주파수이고, 선택도 Q 값이 매우 높은 경우에는, SC 필터에 사용하는 증폭기의 성능이 빠르고, 직류 성분 이득이 커야만 한다. 이와 같은 속도와 이득이 요구됨에 따라 일반적인 범용 증폭기는 이득이 충분치 못하여 사용이 제한되고, 설사 범용 증폭기를 이용하여 필터를 구성하였다 해도 그 특성에 많은 제한을 줄 수밖에 없다. 또한 GaAS MESFET op amp의 경우, 최근의 논문에서도 60[dB] 이상의 이득이 제안된 바 없으므로, 필터 구성시 또 다른 설계 기술이 요구된다. 따라서 본 논문에서는 GaAS MESFET 능동 SC 적분기의 유한한 이득과 offset 전압을 보정한 새로운 구조의 적분기를 제안한다.

• Journal of Industrial Technology
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• v.22 no.B
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• pp.133-139
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• 2002

In precision instrumentation system, an A/D conversion of signal conditioning has been always suffered from some problems ; offset and drift voltage with environmental situation. This paper suggests a method of reducing the offset voltage and the drift error from the A/D conversion hardware using analog signal switching technique with specific operational amplifier circuits. Also, we have designed a hardware active filter and a software digital filter with Auto Zero Tracking algorithm for better dignal process of the our proposed weighing system. Software technique was performed to obtain the stable data from A/D converter. As a result of our experimental works, the proposed system is expected to be used in the industrial field where a high precision measurement is required.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.12
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• pp.40-48
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• 1998

An offset compensation scheme for rail-to-rail CMOS op-amps with complementary input stages is presented. Two auxiliary amplifiers are used to compensate for the offsets of NMOS and PMOS differential input stages, and ping-pong control is employed for continuous-time operation. A 3V offset-compensated rail-to-rail CMOS op-amp has been designed and fabricated using a 0.8$\mu\textrm{m}$ single-poly, double-metal CMOS process. Measurement results show that offsets are reduced about 20 times by this scheme.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.363-366
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• 2007

This paper evaluated the performance of circuit for compensate the frequency offset in OFDM using Simulink and designed a System Generator model for FPGA implementation. System Generator Model generated HDL code and RTL schematic. Also, evaluate the performance through Hardware Co-simulation, and investigated the result of timing analysis and resource estimation.

• Proceedings of the KIEE Conference
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• 2003.11c
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• pp.894-897
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• 2003

Recently, the rapid growth of mobile radio system has led to an increasing demand of low-cost high performance communication IC's. In this paper, we have designed RF front end for wireless LAN receiver employ zero-IF architecture. A low-noise amplifier (LNA) and double-balanced mixer is included in a front end. The zero-IF architecture is easy to integrate and good for low power consumption, so that is coincided to requirement of wireless LAN. But the zero-IF architecture has a serious problem of large offset. Image-reject mixer is a good structure to solve offset problem. Using offset compensation circuit is good structure, too. The front end is implemented in 0.25 ${\mu}m$ CMOS technology. The front end has a noise figure of 5.6 dB, a power consumption of 16 mW and total gain of 22 dB.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.3
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• pp.914-919
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• 2010

It is confirmed that as the distance measurements accuracy of the SDS-TWR(Symmetric Double-Sided Two-Way Ranging) based on CSS(Chirp Spread Spectrum) is considerably degraded due to frequency interference and it causes to severe errors in the localization applications. In this paper, the compensation algorithm based on error rate offset of distance measurement ($CA_d$) is proposed for the purpose to reduce the ranging errors due to by the SDS-TWR ranging problems. The $CA_d$ measures the distance values between two nodes by means of 1m interval about 1~25m distances in the SDS-TWR, and compensates the distance values using the parameters related to the distance compensation. From the experiments, it is analyzed that the $CA_d$. have reduced the distance error to average 95cm and maximum 526cm, and the distance error by the $CA_d$ was below about 60cm in the 25m distances. In particular, the performance of the distance measurements accuracy by the $CA_d$ is very high in LOS(Line Of Sight) environments.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.18 no.1
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• pp.97-103
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• 2018

In satellite communication, modulated beacon signal is spreaded by gold sequence and the modulated beacon is transmitted via linear phase modulation. Due to the difference in characteristics of the satellite and the receiver on the ground, frequency offset (FO) occurs. An existing modulated beacon receiver is a method of synchronizing the frequency of a modulated beacon signal using FFT(Fast Fourier Transform), which not only increases the delay and complexity in terms of system implementation but also has a separate circuit for compensating the phase difference due to FO and phase offset from FFT points. In order to overcome this problem, this paper proposes and analyzes a scheme for compensating and demodulating the coarse FO and phase offset at one time using the 2-phase shaped characteristics of the modulated beacon signal. Also, through the simulation, the modulation index suitable for the proposed method is analyzed and the appropriate cumulative number is also analyzed.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.848-851
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• 2012

In this paper, circuit of reducing the offset voltage in Op-amp, effectively, is newly proposed by using dual capacitor. Capacitors and MOS switches are added in proposed circuit to make up for the weak points of previous circuits ofr reducing the offset voltage in auto-zeroing method. Also, it is designed to reduce the offset voltage in high frequency range by using chopping method, effectively. Circuit simulation and layout are executed by TSMC 1.8V, 0.18um process. From the simulation results, it is verified that magnitude of offset voltage is under 5mV and proposed circuit is good for compensation of offset voltage better than previous auto-zeroing method.