• Journal of Advanced Navigation Technology
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• v.8 no.1
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• pp.57-65
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• 2004

In this paper, keeping pace with light weight, pocket-size, lower-price, we design VCO(Voltage Controlled Oscillator) X/Ku band for using at public RD(Radar Detector) to apply to controlled voltage on base in transistor which used as a oscillator, without using varactor diode in part of VCO tuner. As a result of simulation, we conclude VCO could be have 110 MHz by controlled voltage 4.25 V to 4.80 V and show its output 9.63 dBm at operating frequency, 11.46 GHz, and its phase noise -107.2 dBc at 1 MHz offset frequency. So it turned out suitable performance for commercial use.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.1399-1400
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• 2008

본 논문에서는 TSMC 0.18um 공정을 이용하여 2.45GHz 대역에서 동작하는 RFID 리더에 적용 할 수 있는 전압제어 발진기를 설계하였다. 위상 잡음 특성 향상을 위해 PMOS, NMOS 소자를 대칭으로 구성한 complementary cross-coupled LC 발진기 구조로 설계 하였고 MOS 배렉터를 이용하여 주파수를 가변 하였다. 또한 공정에서 사용되는 인덕터에 차폐 도체면(PGS:Patterned Ground Shield) 구조를 삽입했을 때 인덕터의 품질계수가 약 5.82% 향상되었고. 이에 따른 위상 잡음은 1MHz offset 주파수에서 PGS를 삽입하지 않는 구조에서는 -102.666dBc/Hz 이며, PGS 구조를 삽입한 구조는 -104.328dBc/Hz로 약1.662dBc 정도의 성능이 향상 되었다. 전압제어 발진기 Core 사이즈는 900um ${\times}$ 590um이고 주파수 가변 범위는 배렉터 전압 1.2${\sim}$2.1V에서 249MHz로 11.4% 특성을 보였다. 1.8V공급전압에서 5.76mW의 전력소모를 보였다.

• Journal of the Korean Institute of Intelligent Systems
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• v.17 no.4
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• pp.569-574
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• 2007

최근 많은 광대역 유무선 통신 응용분야에서 OFDM(Orthogonal Frequency Division Multiplexing) 방식을 표준기술로 채택하고 있다. OFDM 방식의 고속 무선 데이터 통신을 위한 FFT 프로세서는 일반적으로 DSP(Digital Signal Processing)로 구현되었으나, 큰 전력 소비를 필요로 한다. 따라서, OFDM 통신방식의 단점인 전력문제를 보완하기 위해서 전류모드 FFT LSI가 제안되었고, 저소비전력 전류모드 FFT LSI를 동작시키기 위해서는 전류모드를 전압모드로 바꾸는 VIC(Voltage to Current Converter) 그리고 다시 전류모드를 전압모드로 바꾸어 주는 IVC(Current to Voltage Converter)가 필요하다. 그러나, OP-AMP로 구현되는 종래의 IVC는 회로규모가 크고, 전력소비가 크며, LSI 내에 크고 정확한 높은 저항을 필요로 한다. 또한 전류모드신호처리에서 많이 이용되는 Current Mirror 회로 등의 출력단자로부터 전류신호를 입력받은 경우, 입력단자간의 전위차가 발생하며, DC offset 전류가 발생하는 등의 문제점을 갖는다. 따라서 본 연구에서는 저전력 동작이 가능하고, 향후, single chip 응용이 가능한 IVC를 $0.35{\mu}m$ 공정에서 설계함으로서, $0.35{\mu}m$ 공정에서의 전류모드 FFT LSI의 전압모드 출력이 가능해졌다 설계된 IVC는 FFT LSI의 출력이 디지털신호로 환산한 ${\pm}1$인 점을 감안하여, 전류모드 FFT LSI의 출력이 $13.65{\mu}A$ 이상일 때에 3.0V의 전압을 출력하고, FFT LSI의 출력이 $0.15{\mu}A$ 이하일 때에 0.5V 이하의 전압을 출력하도록 하였으며, IVC의 총 소비전력은 약 1.65mV이하로 평가되었다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.1
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• pp.68-72
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• 2004

The integrated voltage-controlled-oscillator(VOC) operating at 1.75 ㎓ is designed using the InGaP/GaAs HBT process. The proposed noise removal circuit and FR-4 substrate structure in this letter show the better characteristic of the phase noise and reduce the size of the VCO. The frequency tuning range of the VCO is about 200 ㎒ and the phase noise at 120 ㎑ offset is -119.3 ㏈c/㎐. The power consumption of the VCO core is 11.2 ㎽ at 2.8 V supply voltage and the output power is -2 ㏈m. The calculated figure of merit(FOM) is 191.7, which shows the best performance compared with the previous FET or HBT VCO.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.12
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• pp.2205-2209
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• 2007

In this paper, a voltage controlled oscillator(VCO) of core components for wireless subscriber network is designed. The type of oscillator is colpits method and the oscillator device uses a LC resonator. The product is made on FR-4 substrate with dielectric constant of 4.6. The designed VCO is operated at 3.2V, 10mA and has output value of 0.67dB. The VCO's phase noise property is -102DBc/Hz at offset frequence of 100kHz. The fabricated VCO is the same as target value and can be used for wireless subscriber network.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.12
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• pp.83-89
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• 2014

A ku-band complementary cross-coupled differential voltage controlled oscillator is designed, measured and fabricated using $0.18-{\mu}m$ CMOS technology. A 2.4GHz of very wide frequency tuning at oscillating frequency of 14.5GHz is achieved with presented circuit topology and MOS varactors. Measurement results show -1.66dBm output power with 18mA DC current drive from 3.3V power supply. When 5V is applied, the output power is increased to 0.84dBm with 47mA DC current. -74.5dBc/Hz phase noise at 100kHz offset is measured. The die area is $1.02mm{\times}0.66mm$.

• Journal of Sensor Science and Technology
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• v.5 no.6
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• pp.25-34
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• 1996

In this paper, we have designed signal conditioning circuitry for piezoresistive pressure sensor. Signal conditioning circuitry consists of voltage reference circuit for sensor driving voltage and instrument amplifier for sensor signal amplification. Signal conditioning circuitry is simulated using HSPICE in a single poly double metal $1.5\;{\mu}m$ BiCMOS technology. Simulation results of band-gap reference circuit showed that temperature coefficient of $21\;ppm/^{\circ}C$ at the temperature range of $0\;{\sim}\;70^{\circ}C$ and PSRR of 80 dB. Simulation results of BiCMOS amplifier showed that dc voltage gain, offset voltage, CMRR, CMR and PSRR are outperformed to CMOS and Bipolar, but power dissipation and noise voltage were more improved in CMOS than BiCMOS and Bipolar. Designed signal conditioning circuitry showed high input impedance, low offset and good CMRR, therefore, it is possible to apply sensor and instrument signal conditioning circuitry.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2007.04a
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• pp.477-480
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• 2007

저전력 OFDM(orthogonal frequency division multiplexing) 시스템용 FFT(Fast-Fourier-Transform) LSI를 저전력 동작을 시키기 위해서 FFT LSI는 current-mode 회로로 구현되었다. Current-mode FFT LSI에서, VIC(Voltage-to-current converter)는 입력 전압 신호를 전류로 바꾸는 first main device이다. 저전력 OFDM을 위해 FFT LSI와 VIC가 한 개의 칩과 결합되는 것을 고려하면, VIC는 전력 손실은 낮고, VIC와 FFT LSI 사이에서의 DC offset 전류는 최소인 작은 크기의 chip으로 설계되어야 한다. 본 논문에서는 새로운 VIC를 제안한다. 선형 동작구간을 넓히고 DC offset 전류를 대폭 감소하는 방법을 제시하였다. VIC는 0.35[um] CMOS process로 구현되었으며, 시뮬레이션 결과에 따르면 제안된 VIC는 current-mode FFT LSI와 0.1[uA] 미만의 매우 작은 DC offset 전류, 1.4[V]의 넓은 선형구간을 갖으며, 저전력으로 동작한다.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.5
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• pp.431-439
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• 2017

An asymmetric half-bridge is one of the most promising topology in low-power application because of its small number of components and inherent zero-voltage switching capability. However, when it is designed taking into a hold-up time, it has large transformer offset current and small transformer turns-ratio, which severely decreases the total efficiency of s converter. In this paper, a new boost-integrated asymmetric half-bridge converter is proposed to solve these problems. The integrated boost converter compensates the hold-up time, thus facilitating optimal design in nominal state. As a result, the proposed converter can achieve high efficiency in nominal state. To verify the effectiveness of the proposed converter, an experiment is conducted using a 250-400 V input and 45 V/3.3 A output prototype.

• Journal of IKEEE
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• v.23 no.3
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• pp.1020-1026
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• 2019

In this paper, a rotor polarity detection algorithm is proposed to control the single-phase permanent magnet synchronous motors(SP-PMSMs) for high speed sensorless operation. Generally, the sensorless control of a SP-PMSM is switched to the sensorless operation in a specific speed region after the open loop startup. As a result, it is necessary to detect the rotor polarity to maintain a constant rotational direction of the SP-PMSM at the starting process. There, this paper presents a novel rotor polarity detection method using a high frequency voltage signal and offset current which is generated by current regulator. The proposed algorithm verified the effectiveness and usefulness of the rotor polarity detection through several experiments.