• Transactions on Electrical and Electronic Materials
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• 제16권3호
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• pp.130-134
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• 2015

This research proposes the use of a composition modulated (ZrO₂)_x(Al₂O₃)_1-x film as a charge trapping layer for charge trap flash memory; this is possible when the Zr (Al) atomic percent is controlled to form a variable bandgap as identified by the valence band offsets and electron energy loss spectrum measurements. Compared to memory devices with uniform compositional (ZrO₂)_0.1(Al₂O₃)_0.9 or a (ZrO₂)_0.92(Al₂O₃)_0.08 trapping layer, the memory device using the composition modulated (ZrO₂)_x(Al₂O₃)_1-x as the charge trapping layer exhibits a larger memory window (6.0 V) at the gate sweeping voltage of ±8 V, improved data retention, and significantly faster program/erase speed. Improvements of the memory characteristics are attributed to the special energy band alignments resulting from non-uniform distribution of elemental composition. These results indicate that the composition modulated (ZrO₂)_x(Al₂O₃)_1-x film is a promising candidate for future nonvolatile memory device applications.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권1호
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• pp.18-26
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• 2004

Back-gated silicon-on-insulator MOSFET -a threshold-voltage adjustable device-employs a constant back-gate potential to terminate source-drain electric fields and to provide carrier confinement in the channel. This suppresses shortchannel effects of nano-scale and of high drain biases, while allowing a means to threshold voltage control. We report here a theoretical analysis of this geometry to identify its natural length scales, and correlate the theoretical results with experimental device measurements. We also analyze experimental electrical characteristics for misaligned back-gate geometries to evaluate the influence on transport behavior from the device electrostatics due to the structure and position of the back-gate. The backgate structure also operates as a floating-gate nonvolatile memory (NVRAM) when the back-gate is floating. We summarize experimental and theoretical results that show the nano-scale scaling advantages of this structure over the traditional front floating-gate NVRAM.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.373-373
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• 2014

Resistive-change random access memory (ReRAM) device is one of the promising candidates owing to its simple structure, high scalability potential and low power operation. Many resistive switching devices using transition metal oxides materials such as NiO, Al2O3, ZnO, HfO2, $TiO_2$, have attracting increased attention in recent years as the next-generation nonvolatile memory. Among various transition metal oxides materials, HfO2 has been adopted as the gate dielectric in advanced Si devices. For this reason, it is advantageous to develop an HfO2-based ReRAM devices to leverage its compatibility with Si. However, the annealing temperature of these high-k thin films for a suitable resistive memory switching is high, so there are several reports for low temperature process including microwave irradiation. In this paper, we demonstrate the bipolar resistive switching characteristics in the microwave irradiation annealing processed Ag/HfO2/Pt ReRAM device. Compared to the as-deposited Ag/HfO2/Pt device, highly improved uniformity of resistance values and operating voltage were obtained from the micro wave annealing processed HfO2 ReRAM device. In addition, a stable DC endurance (>100 cycles) and a high data retention (>104 sec) were achieved.

• 전기학회논문지
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• 제67권6호
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• pp.799-803
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• 2018

We demonstrated memory thin-film transistors (MTFTs) with organic ferroelectric polymer poly(vinylidene fluoride-co-trifluoroethylene) and an amorphous oxide semiconducting indium gallium zinc oxide channel on the elastomeric substrate. The dielectric constant for the P(VDF-TrFE) thin film prepared on the elastomeric substrate was calculated to be 10 at a high frequency of 1 MHz. The voltage-dependent capacitance variations showed typical butterfly-shaped hysteresis behaviors owing to the polarization reversal in the film. The carrier mobility and memory on/off ratio of the MTFTs showed $15cm^2V^{-1}s^{-1}$ and $10^6$, respectively. This result indicates that the P(VDF-TrFE) film prepared on the elastomeric substrate exhibits ferroelectric natures. The fabricated MTFTs exhibited sufficiently encouraging device characteristics even on the elastomeric substrate to realize mechanically stretchable nonvolatile memory devices.

• 대한전자공학회논문지SD
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• 제38권11호
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• pp.765-770
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• 2001

고온 급속 열처리시킨 LiNbO₃/AIN/Si(100) 구조를 이용하여 MFIS 소자를 제작하고, 비휘발성 메모리 동작 가능성을 확인하였다. 고유전율 AIN 박막 위에 Pt 전극을 증착시켜 제작한 MIS 구조에서 측정한 1MHz C-V 특성곡선에서는 히스테리시스가 전혀 없고 양호한 계면특성을 보였으며, 축적 영역으로부터 산출한 비유전율 값은 약 8 이었다. Pt/LiNbO₃/AIN/Si(100) 구조에서 측정한 1MHz C-V 특성의 축적영역에서 산출한 LiNbO₃ 박막의 비유전율 값은 약 23 이었으며, ±5 V의 바이어스 범위 내에서의 메모리 윈도우는 약 1.2 V이었다. 이 MFIS 구조에서의 게이트 누설전류밀도는 ±500 kV/cm의 전계 범위 내에서 10/sup -9/ A/㎠ 범위를 유지하였다. 500 kHz의 바이폴러 펄스를 인가하면서 측정한 피로특성은 10/sup 11/ cycle 까지 초기값을 거의 유지하는 우수한 특성을 보였다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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• pp.384-384
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• 2012

We report nonvolatile memory properties of poly (3, 4-ethylenedioxythiophene) (PEDOT) thin films grown by vapor phase polymerization using FeCl3 as an oxidant. Liquid-bridge-mediated transfer method was employed to remove FeCl3 for generation of pure PEDOT thin films. From the electrical measurement of memory device, we observed voltage induced bipolar resistive switching behavior with ON/OFF ratio of 103 and reproducibility of more than 103 dc sweeping cycles. ON and OFF states were stable up to 104 seconds without significant degradation. Cyclic voltammetry data illustrates resistive switching effect can be attributed to formation and rupture of conducting paths due to oxidation and reduction of PEDOT. The maximum current before reset process was found to be increase linearly with increase in compliance current applied during set process.

• 한국세라믹학회지
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• 제41권4호
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• pp.273-276
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• 2004

Report ferroelectric memories based on 0.35$\mu\textrm{m}$ CMOS technology ensuring ten-year retention and imprint at 175$^{\circ}C$. This excellent reliability resulted from newly developed BT-based ferroelectric films with superior reliability performance at high temperatures, and also resulted from robust integration schemes free from ferroelectric degradation due to process impurities such as moisture and hydrogen. The superior reliabilities at high temperature of ferroelectric memories using BT-based films are due to the random orientation by special bake treatments.

• 한국전기전자재료학회논문지
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• 제11권1호
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• pp.7-11
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• 1998

In this paper, a new synapse cell with nonvolatile SONOS semiconductor memory device is proposed and it's fundamental function electronically implemented SONOS NVSM has shown characteristics that the memory value, synaptic weights, can be increased or decreased incrementally. A novel SONOS synapse is used to read out the stored analog value. For the purpose of synapse implementation using SONOS NVSM, this work has investigated multiplying characteristics including weight updating characteristics and neuron output characteristics. It is concluded that SONOS synapse cell has good agreement for use as a synapse in artificial neural networks.

• 한국컴퓨터정보학회논문지
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• 제14권6호
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• pp.1-10
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• 2009

플래시 메모리는 비휘발성이고 저전력으로 동작하며 가볍고 내구성이 강하다. 이러한 특성으로 휴대용 멀티미디어 재생기(PMP)와 같은 모바일 컴퓨팅 환경에서의 저장 장치로 많이 사용되고 있다. 대용량의 플래시 메모리를 저장 장치로 가진 모바일 기기들은 비디오/오디오/사진등과 같은 다양한 종류의 멀티미디어 데이터를 저장하고 재생한다. 모바일 컴퓨팅 장치를 위한 기존의 인덱스 시스템은 노래 가사와 같은 텍스트 형태의 정보 검색에 비효육적이다. 본 논문에서는 대용량 플래시 메모리 기반 임베디드 텍스트 인덱스(Embedded Text Index: EMTEX) 시스템을 제안한다. EMTEX는 먼저 임베디드 시스템을 고려한 압축 알고리즘을 사용하며, 텍스트 인덱스가 구성된 필드에 삽입 및 삭제시 인덱스에 즉시 반영된다. 뿐만 아니라, 플래시 메모리의 특성을 고려한 효율적인 삽입, 삭제, 재구성 기능을 수행하며, DBMS의 상위 계층에서 독립적으로 동작한다는 장점을 갖는다. 제안한 시스템의 성능 평가를 위해 다양한 환경에서 실험을 수행하였다. 그 결과 EMTEX는 임베디드 환경에서 Oracle Text나 FT3와 같은 기존의 인덱스 시스템보다 더 좋은 성능을 보여주었다.

• 한국전기전자재료학회논문지
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• 제15권7호
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• pp.576-582
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• 2002

Nonvolatile semiconductor memory devices with reoxidized nitrided oxide(RONO) gate dielectrics were fabricated, and nitrogen distribution and bonding species which contribute to memory characteristics were analyzed. Also, memory characteristics of devices depending on the anneal temperatures were investigated. The devices were fabricated by retrograde twin well CMOS processes with $0.35\mu m$ design rule. The processes could be simple by in-situ process in growing dielectric. The nitrogen distribution and bonding states of gate dielectrics were investigated by Dynamic Secondary Ion Mass Spectrometry(D-SIMS), Time-of-Flight Secondary Ion Mass Spectrometry(ToF-SIMS), and X-ray Photoelectron Spectroscopy(XPS). As the nitridation temperature increased, nitrogen concentration increased linearly, and more time was required to form the same reoxidized layer thickness. ToF-SIMS results showed that SiON species were detected at the initial oxide interface which had formed after NO annealing and $Si_2NO$ species within the reoxidized layer formed after reoxidation. As the anneal temperatures increased, the device showed worse retention and degradation properties. It could be said that nitrogen concentration near initial interface is limited to a certain quantity, so the excess nitrogen is redistributed within reoxidized layer and contribute to electron trap generation.