• 한국식품과학회지
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• 제16권2호
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• pp.169-174
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• 1984

김치의 주재료인 배추와 부재료를 한가지씩 첨가한 각 시료들을 $12{\sim}16^{\circ}C$에서 숙성시키면서, 유기산, 이산화탄소, alcohol 및 카보닐 화합물의 함량 변화를 측정하였고, 관능 검사를 실시하였다. 비휘발성 유기산은 lactic succinic, fumaric, malic acid가 분리되었고, 휘발성 유기산은 acetic, formic, propionic, butyric, valeric n-heptanoic acid 등이 분리되었으며, 카보닐 화합물은 acetaldehyde와 acetone이 분리되었다. Lactic acid는 숙성 시간에 따라 점차 증가했고, 고춧가루, 마늘, 파가 첨가된 김치에 많았다. Acetic acid도 발효가 진행됨에 따라 함량이 증가하였으며, 특히 마늘이 첨가된 김치에서 두드러졌다. 이산화탄소의 함량은 마늘이 첨가된 김치에 많았으며, alcohol류는 전 시료에서 ethanol 만이 확인되었다. Acetaldehyde와 acetone은 김치의 off-flavor와 직접적인 관계가 없는 것으로 나타났다.

• 한국세라믹학회지
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• 제49권6호
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• pp.631-636
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• 2012

Conventional SONOS (poly-silicon/oxide/nitride/oxide/silicon) type memory is associated with a retention issue due to the continuous demand for scaled-down devices. In this study, $Al_2O_3/Y_2O_3/SiO_2$ (AYO) multilayer structures using a high-k $Y_2O_3$ film as a charge-trapping layer were fabricated for nonvolatile memory applications. This work focused on improving the retention properties using a $Y_2O_3$ layer with different tunnel oxide thickness ranging from 3 nm to 5 nm created by metal organic chemical vapor deposition (MOCVD). The electrical properties and reliabilities of each specimen were evaluated. The results showed that the $Y_2O_3$ with 4 nm $SiO_2$ tunnel oxide layer had the largest memory window of 1.29 V. In addition, all specimens exhibited stable endurance characteristics (program/erasecycles up to $10^4$) due to the superior charge-trapping characteristics of $Y_2O_3$. We expect that these high-k $Y_2O_3$ films can be candidates to replace $Si_3N_4$ films as the charge-trapping layer in SONOS-type flash memory devices.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2005년도 춘계종합학술대회
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• pp.981-984
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• 2005

본 논문에서는 전하트랩형 SONOS 메모리에서 프로그래밍 동작 후 변화되는 문턱전압을 시뮬레이션에 의하여 구현하고자 한다. SONOS 소자는 질화막내의 트랩 뿐 만아니라, 질화막-블로킹산화막 계면에 존재하는 트랩에 전하를 저장하는 전하트랩형 비휘발성기억소자로서, 기억상태에 따른 문턱전압을 시뮬레이션으로 구현하기위해서는 질화막내의 트랩을 정의할 수 있어야 된다. 그러나 기존의 시뮬레이터에서는 질화막내의 트랩모델이 개발되어 있지 않은 것이 현실이다. 따라서 본 연구에서는 SONOS 구조의 터널링산화막-질화막 계면과 질화막-블로킹산화막 계면에 두개의 전극을 정의하여 프로그램 전압과 시간에 따라서 전극에 유기되는 전하량으로부터 전하트랩형 기억소자의 문턱전압변화를 시뮬레이션 할 수 있는 새로운 방법을 제안한다.

• 한국전기전자재료학회논문지
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• 제13권11호
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• pp.914-920
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• 2000

When the charge-trap type SONOS(polysilicon-oxide-nitride-oxide-semiconductor) cells are used to flash memory, the tunneling program/erase condition to minimize the generation of interface traps was investigated. SONOSFET NVSM(Nonvolatile Semiconductor Memory) cells were fabricated using 0.35 ㎛ standard memory cell embedded logic process including the ONO cell process, based on retrograde twin-well, single-poly, single metal CMOS(Complementary Metal Oxide Semiconductor) process. The thickness of ONO triple-dielectric for the memory cell is tunnel oxide of 24 $\AA$, nitride of 74 $\AA$, blocking oxide of 25 $\AA$, respectively. The program mode(V$\_$g/=7, 8, 9 V, V$\_$s/=V$\_$d/=-3 V, V$\_$b/=floating) and the erase mode(V$\_$g/=-4, -5, -6 V, V$\_$s/=V$\_$d/=floating, V$\_$b/=3 V) by MFN(Modified Fowler-Nordheim) tunneling were used. The proposed programming condition for the flash memory of SONOSFET NVSM cells showed less degradation(ΔV$\_$th/, S, G$\_$m/) characteristics than channel MFN tunneling operation. Also, the program inhibit conditins of unselected cell for separated source lines NOR-type flash memory application were investigated. we demonstrated that the phenomenon of the program disturb did not occur at source/drain voltage of 1 V∼12 V and gate voltage of -8 V∼4 V.

• 한국정보과학회논문지:컴퓨팅의 실제 및 레터
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• 제13권4호
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• pp.213-225
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• 2007

최근 디지털 카메라, MP3 플레이어, 핸드폰과 같이 이동성이 중요한 요소로 차지하는 기기들이 많이 등장하였다. 이에 따라 소형화, 대용량화, 저 전력화, 비휘발성, 고속화 그리고 충격에 강한 저장장치가 필요하게 되었다. 플래시 메모리는 이러한 요구사항을 만족시키는 저장장치이다. 플래시 메모리는 하드웨어적 특성으로 인해 쓰기 전 소거(erase-before-write)연산을 수행해야만 한다. 따라서 플래시 메모리를 효과적으로 동작시키기 위해서 FTL이 필요하다. FTL은 플래시 메모리의 단점을 보완해주면서 상위파일 시스템을 그대로 사용할 수 있는 장점을 가진다. 따라서 차후 디스크는 플래시 메모리로 대체될 것이다. 대부분의 PC에서 윈도우즈 기반의 OS를 사용하기 때문에 기존 FTL이 윈도우즈 기반의 OS에서 어떠한 성능을 보이는지 분석할 필요가 있다. 본 논문에서는 실험속도를 빠르게 하기 위해 FTL 성능분석도구를 개발한다. 이를 이용하여 여러 FTL 알고리즘들이 윈도우즈 기반의 OS의 디스크 I/O를 처리하는 성능을 분석한다. FTL의 성능은 매핑 방법, 한 블록 내에 섹터를 기록하는 방법과 덮어쓰기의 처리방법 둥을 분석하여 비교가 가능하다. 실험한 FTL중 개선된 로그 블록 기법이 실험 결과 중에 가장 좋은 성능을 보인다. 따라서 차후 디스크가 플래시 메모리로 대체 될 경우, 로그 블록 기법을 잘 적용 시켜야 할 것이다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.448-448
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• 2010

Magnetic random access memory (MRAM) has made a prominent progress in memory performance and has brought a bright prospect for the next generation nonvolatile memory technologies due to its excellent advantages. Dry etching process of magnetic thin films is one of the important issues for the magnetic devices such as magnetic tunneling junctions (MTJs) based MRAM. CoFeB is a well-known soft ferromagnetic material, of particular interest for magnetic tunnel junctions (MTJs) and other devices based on tunneling magneto-resistance (TMR), such as spin-transfer-torque MRAM. One particular example is the CoFeB - MgO - CoFeB system, which has already been integrated in MRAM. In all of these applications, knowledge of control over the etching properties of CoFeB is crucial. Recently, transferring the pattern by using milling is a commonly used, although the redeposition of back-sputtered etch products on the sidewalls and the low etch rate of this method are main disadvantages. So the other method which has reported about much higher etch rates of >$50{\AA}/s$ for magnetic multi-layer structures using $Cl_2$/Ar plasmas is proposed. However, the chlorinated etch residues on the sidewalls of the etched features tend to severely corrode the magnetic material. Besides avoiding corrosion, during etching facets format the sidewalls of the mask due to physical sputtering of the mask material. Therefore, in this work, magnetic material such as CoFeB was etched in an ICP etching system using the gases which can be expected to form volatile metallo-organic compounds. As the gases, carbon monoxide (CO) and ammonia ($NH_3$) were used as etching gases to form carbonyl volatiles, and the etched features of CoFeB thin films under by Ta masking material were observed with electron microscopy to confirm etched resolution. And the etch conditions such as bias power, gas combination flow, process pressure, and source power were varied to find out and control the properties of magnetic layer during the process.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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• pp.240.2-240.2
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• 2013

The device scale of flash memory was confronted with quantum mechanical limitation. The next generation memory device will be required a break-through for the device scaling problem. Especially, graphene is one of important materials to overcome scaling and operation problem for the memory device, because ofthe high carrier mobility, the mechanicalflexibility, the one atomic layer thick and versatile chemistry. We demonstrate the hybrid memory consisted with the metal-oxide quantum dots and the mono-layered graphene which was transferred to $SiO_2$ (5 nm)/Si substrate. The 5-nm thick secondary $SiO_2$ layer was deposited on the mono-layered graphene by using ultra-high vacuum sputtering system which base pressure is about $1{\times}10^{-10}$ Torr. The $In_2O_3$ quantum dots were distributed on the secondary $SiO_2$2 layer after chemical reaction between deposited In layer and polyamic acid layer through soft baking at $125^{\circ}C$ for 30 min and curing process at $400^{\circ}C$ for 1 hr by using the furnace in $N_2$ ambient. The memory devices with the $In_2O_3$ quantum dots on graphene monolayer between $SiO_2$ thin films have demonstrated and evaluated for the application of next generation nonvolatile memory device. We will discuss the electrical properties to understating memory effect related with quantum mechanical transport between the $In_2O_3$ quantum dots and the Fermi level of graphene layer.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2010년도 제39회 하계학술대회 초록집
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• pp.255-255
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• 2010

Recently, nonvolatile memories (NVM) of various types have been researched to improve the electrical performance such as program/erase voltages, speed and retention times. Also, the charge trap memory is a strong candidate to realize the ultra dense 20-nm scale NVM. Furthermore, the high charge efficiency and the thermal stability of SiC nanocrystals NVM with single $SiO_2$ tunnel barrier have been reported. [1-2] In this study, the SiC charge trap NVM was fabricated and electrical properties were characterized. The 100-nm thick Poly-Si layer was deposited to confined source/drain region by using low-pressure chemical vapor deposition (LP-CVD). After etching and lithography process for fabricate the gate region, the $Si_3N_4/SiO_2/Si_3N_4$ (NON) and $SiO_2/Si_3N_4/SiO_2$ (ONO) barrier engineered tunnel layer were deposited by using LP-CVD. The equivalent oxide thickness of NON and ONO tunnel layer are 5.2 nm and 5.6 nm, respectively. By using ultra-high vacuum magnetron sputtering with base pressure 3x10-10 Torr, the 2-nm SiC and 20-nm $SiO_2$ were successively deposited on ONO and NON tunnel layers. Finally, after deposited 200-nm thick Al layer, the source, drain and gate areas were defined by using reactive-ion etching and photolithography. The lengths of squire gate are $2\;{\mu}m$, $5\;{\mu}m$ and $10\;{\mu}m$. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer, E4980A LCR capacitor meter and an Agilent 81104A pulse pattern generator system. The electrical characteristics such as the memory effect, program/erase speeds, operation voltages, and retention time of SiC charge trap memory device with barrier engineered tunnel layer will be discussed.

• Korean Journal of Anesthesiology
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• 제71권6호
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• pp.459-466
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• 2018

Background: To compare the effects of intraoperative infusions of balanced electrolyte solution (BES)-based hydroxyethyl starch (HES) and saline-based albumin on metabolic acidosis and acid/base changes during major abdominal surgery conducted using Stewart's approach. Methods: Forty patients, aged 20-65 years, undergoing major abdominal surgery, were randomly assigned to the HES group (n = 20; received 500 ml of BES-based 6% HES 130/0.4) or the albumin group (n = 20; received 500 ml of normal saline-based 5% albumin). Acid-base parameters were measured and calculated using results obtained from arterial blood samples taken after anesthesia induction (T1), 2 hours after surgery commencement (T2), immediately after surgery (T3), and 1 hour after arriving at a postanesthetic care unit (T4). Results: Arterial pH in the HES group was significantly higher than that in the albumin group at T3 ($7.40{\pm}0.04$ vs. $7.38{\pm}0.04$, P = 0.043), and pH values exhibited significant intergroup difference over time (P = 0.002). Arterial pH was significantly lower at T3 and T4 in the HES group and at T2, T3, and T4 in the albumin group than at T1. Apparent strong ion difference (SIDa) was significantly lower at T2, T3, and T4 than at T1 in both groups. Total plasma weak nonvolatile acid ($A_{TOT}$) was significantly lower in the HES group than in the albumin group at T2, T3 and T4 and exhibited a significant intergroup difference over time (P < 0.001). Conclusions: BES-based 6% HES infusion was associated with lower arterial pH values at the end of surgery than saline-based 5% albumin infusion, but neither colloid caused clinically significant metabolic acidosis (defined as an arterial pH < 7.35).

• 마이크로전자및패키징학회지
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• 제27권4호
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• pp.77-81
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• 2020

Resistive RAM (ReRAM)은 전이금속 산화물의 저항변화 특성을 이용하는 차세대 비휘발 메모리로 전이금속산화물 내의 산소공공의 재분포를 통한 저항변화 특성을 이용한다. 따라서 저항변화 특성을 위해 전이금속산화물 내에는 일정량 이상의 산소공공이 요구되며 이를 위해서는 박막 형성 공정에서 산화 수를 조절할 수 있는 공정이 필요하다. 본 연구에서는 직접패턴이 가능한 photochemical metal organic deposition (PMOD) 공정을 사용하여 UV 노출에 의해 photochemical metal organic precursor의 ligand가 분해되는 과정에서 전기장을 인가하여 박막내의 산화 수를 조절하는 실험을 진행하였다. Electric field assisted PMOD (EFAPMOD) 법을 이용하여 FeOx 박막의 산화 수 조절이 가능함을 x-ray photoelectron spectroscopy (XPS) 분석과 I-V 측정을 통하여 확인하였으며, EFAPMOD 공정 중 인가하는 전압의 크기를 조절하여 박막의 산화 수를 조절할 수 있음을 확인하였다. 따라서 EFAPMOD 공정 중 인가전압의 크기를 이용하여 저항변화 특성에 적합한 적정한 산화수를 가지는 금속산화물 박막을 얻고 그 저항변화 특성을 조정할 수 있음을 확인하였다.