• 한국재료학회지
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• 제27권11호
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• pp.590-596
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• 2017

We demonstrated a CNT synaptic transistor by integrating 6,6-phenyl-C61 butyric acid methyl ester(PCBM) molecules as charge storage molecules in a polyimide(PI) dielectric layer with carbon nanotubes(CNTs) for the transistor channel. Specifically, we fabricated and compared three different kinds of CNT-based synaptic transistors: a control device with $Al_2O_3/PI$, a single PCBM device with $Al_2O_3/PI:PCBM$(0.1 wt%), and a double PCBM device with $Al_2O_3/PI:PCBM$(0.1 wt%)/PI:PCBM(0.05 wt%). Statistically, essential device parameters such as Off and On currents, On/Off ratio, device yield, and long-term retention stability for the three kinds of transistor devices were extracted and compared. Notably, the double PCBM device exhibited the most excellent memory transistor behavior. Pulse response properties with postsynaptic dynamic current were also evaluated. Among all of the testing devices, double PCBM device consumed such low power for stand-by and its peak current ratio was so large that the postsynaptic current was also reliably and repeatedly generated. Postsynaptic hole currents through the CNT channel can be generated by electrons trapped in the PCBM molecules and last for a relatively short time(~ hundreds of msec). Under one certain testing configuration, the electrons trapped in the PCBM can also be preserved in a nonvolatile manner for a long-term period. Its integrated platform with extremely low stand-by power should pave a promising road toward next-generation neuromorphic systems, which would emulate the brain power of 20 W.

• JSTS:Journal of Semiconductor Technology and Science
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• 제17권2호
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• pp.210-215
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• 2017

We have developed the neuromorphic system that can work with the four-terminal Si-based synaptic devices and verified the operation of the system using simulation tool and printed-circuit-board (PCB). The symmetrical current mirrors connected to the n-channel and p-channel synaptic devices constitute the synaptic integration part to express the excitation and the inhibition mechanism of neurons, respectively. The number and the weight of the synaptic devices affect the amount of the current reproduced from the current mirror. The double-stage inverters controlling delay time and the NMOS with large threshold voltage ($V_T$) constitute the action-potential generation part. The generated action-potential is transmitted to next neuron and simultaneously returned to the back gate of the synaptic device for changing its weight based on spike-timing-dependent-plasticity (STDP).

• 세라미스트
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• 제21권2호
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• pp.4-18
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• 2018

Lastly, neuromorphic computing chip has been extensively studied as the technology that directly mimics efficient calculation algorithm of human brain, enabling a next-generation intelligent hardware system with high speed and low power consumption. Three-terminal based synaptic transistor has relatively low integration density compared to the two-terminal type memristor, while its power consumption can be realized as being so low and its spike plasticity from synapse can be reliably implemented. Also, the strong electrical interaction between two or more synaptic spikes offers the advantage of more precise control of synaptic weights. In this review paper, the results of synaptic transistor mimicking synaptic behavior of the brain are classified according to the channel material, in order of silicon, organic semiconductor, oxide semiconductor, 1D CNT(carbon nanotube) and 2D van der Waals atomic layer present. At the same time, key technologies related to dielectrics and electrolytes introduced to express hysteresis and plasticity are discussed. In addition, we compared the essential electrical characteristics (EPSC, IPSC, PPF, STM, LTM, and STDP) required to implement synaptic transistors in common and the power consumption required for unit synapse operation. Generally, synaptic devices should be integrated with other peripheral circuits such as neurons. Demonstration of this neuromorphic system level needs the linearity of synapse resistance change, the symmetry between potentiation and depression, and multi-level resistance states. Finally, in order to be used as a practical neuromorphic applications, the long-term stability and reliability of the synapse device have to be essentially secured through the retention and the endurance cycling test related to the long-term memory characteristics.

• Applied Microscopy
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• 제51권
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• pp.7.1-7.9
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• 2021

Neuromorphic systems require integrated structures with high-density memory and selector devices to avoid interference and recognition errors between neighboring memory cells. To improve the performance of a selector device, it is important to understand the characteristics of the switching process. As changes by switching cycle occur at local nanoscale areas, a high-resolution analysis method is needed to investigate this phenomenon. Atomic force microscopy (AFM) is used to analyze the local changes because it offers nanoscale detection with high-resolution capabilities. This review introduces various types of AFM such as conductive AFM (C-AFM), electrostatic force microscopy (EFM), and Kelvin probe force microscopy (KPFM) to study switching behaviors.

• 전기전자학회논문지
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• 제26권4호
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• pp.633-638
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• 2022

최근 인간의 뇌를 모방한 스파이킹 뉴럴 네트워크(SNNs)의 뉴로모픽(Neuromorphic) 시스템이 주목을 받고 있다. 뉴로모픽 기술은 인지 응용과 처리 과정에서 속도가 빠르고 전력 소모가 적다는 장점이 있다. SNNs 기반의 저항성 랜덤 엑세스 메모리(RRAM) 은 병렬 연산을 위한 가장 효율적인 구조이며 스파이크 타이밍 종속 가소성(STDP)의 점진적인 스위칭 동작을 수행한다. 시냅스 소자 동작으로서의 RRAM은 저 전력 프로세싱과 다양한 메모리 상태를 표현한다. 하지만, RRAM 소자의 통합은 높은 스위칭 전압 및 전류를 유발하여 높은 전력 소비를 초래한다. RRAM의 동작 전압을 낮추기 위해서는 스위칭 레이어와 금속 전극의 신소재를 개발하는 것이 중요하다. 본 연구에서는 스위칭 전압을 낮추기 위해 전기적, 기계적 특성이 우수한 단일 벽 탄소나노튜브(SWCNTs)를 갖는 (Metal/Al₂O₃/HfO_x/SWCNTs/N+silicon, MOCS)라는 최적화된 새로운 구조를 제안하였다. 따라서 SWCNTs 기반 멤리스터의 점진적인 스위칭 동작 및 저 전력 I/V 곡선의 향상을 보여준다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권5호
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• pp.657-663
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• 2016

In this work, a novel silicon (Si) based floating body synaptic transistor (SFST) is studied to mimic the transition from short-term memory to long-term one in the biological system. The structure of the proposed SFST is based on an n-type metal-oxide-semiconductor field-effect transistor (MOSFET) with floating body and charge storage layer which provide the functions of short- and long-term memories, respectively. It has very similar characteristics with those of the biological memory system in the sense that the transition between short- and long-term memories is performed by the repetitive learning. Spike timing-dependent plasticity (STDP) characteristics are closely investigated for the SFST device. It has been found from the simulation results that the connectivity between pre- and post-synaptic neurons has strong dependence on the relative spike timing among electrical signals. In addition, the neuromorphic system having direct connection between the SFST devices and neuron circuits are designed.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권3호
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• pp.365-373
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• 2015

We propose a simple and compact thyristor-based neuron circuit. The thyristor exhibits bi-stable characteristics that can mimic the action potential of the biological neuron, when it is switched between its OFF-state and ON-state with the help of assist circuit. In addition, a method of inter-neuron connection with synaptic devices is proposed, using double current mirror circuit. The circuit utilizes both short-term and long-term plasticity of the synaptic devices by flowing current through them and transferring it to the post-synaptic neuron. The double current mirror circuit is capable of shielding the pre-synaptic neuron from the post synaptic-neuron while transferring the signal through it, maintaining the synaptic conductance unaffected by the change in the input voltage of the post-synaptic neuron.

• 공업화학전망
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• 제23권6호
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• pp.3-13
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• 2020

저출산 고령화 사회로의 진입은 대한민국뿐만 아니라 전 세계적으로 많은 사회 문제를 야기하고 있다. 그 중에서 고령 인구 증가로 인한 의료 수요 증가와 이를 뒷받침 할 의료인력 부족은 곧 다가올 사회문제이다. 4차 산업 혁명으로 인해 다양한 사회문제에 대한 혁신적인 해법들이 제시되고 있는데, 본 기고문에서는 다가올 고령화 사회에서 의료인력 부족 등에 의한 해결법으로 원격의료 지원을 위한 인공지능 활용을 다루고자 한다. 병 진단 및 예측을 위한 여러 가지 인공지능 알고리즘은 이미 많이 개발 되어 있으나, 일반적으로 딥러닝에 많이 쓰이는 인공신경망 구조인 합성곱 뉴럴네트워크(convolution neural network)나 기존 퍼셉트론(perceptron) 구조에서 벗어나 확률론적 인공신경망 중에 하나인 베이지안 뉴럴네트워크(Bayesian neural network)를 다루고자 한다. 그중에서 연산효율적이며 뉴로모픽 하드웨어로 구현 가능성이 높고 실제 진단 예측(diagnosis prediction) 문제 해결에 강점을 보이는 알고리즘으로써 naive Bayes classifer를 활용한 연구를 소개하고자 한다.

• 접착 및 계면
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• 제25권2호
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• pp.43-49
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• 2024

최근 유연 유기 시냅스 트랜지스터(flexible organic synaptic transistor, FOST)는 유기 반도체를 채널층으로 하여 유연성, 생체 적합성, 손쉬운 공정성, 복잡성 감소로 인해 주목받고 있다. 또한 기존의 무기 시냅스 소자에 비해 간단한 구조와 낮은 제조 비용으로 인간 뇌의 가소성을 모방할 수 있으므로 차세대 웨어러블 장치 및 소프트 로보틱스 기술에 적용이 가능하다. 유연 유기 시냅스 트랜지스터에서 유기 기판은 소자의 준비 온도에 민감하고 고온 처리 공정은 유기 기판의 열변형을 일으켜 고성능 소자를 제조하기 위해서는 저온용액 기반의 공정 기술이 필요하다. 본 총설에서는 저온 용액 기반 유연 유기 시냅스 트랜지스터 소자의 최신 공정 기술 연구 상황을 요약하고, 이에 따른 문제점과 해결해야 할 과제를 제시하고자 한다.