• International Journal of Computer Science & Network Security
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• v.24 no.1
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• pp.107-118
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• 2024

With the seamless growth of the technology, network usage requirements are expanding day by day. The majority of electronic devices are capable of communication, which strongly requires a secure and reliable network. Network-based intrusion detection systems (NIDS) is a new method for preventing and alerting computers and networks from attacks. Machine Learning is an emerging field that provides a variety of ways to implement effective network intrusion detection systems (NIDS). Bagging and Boosting are two ensemble ML techniques, renowned for better performance in the learning and classification process. In this paper, the study provides a detailed literature review of the past work done and proposed a novel ensemble approach to develop a NIDS system based on the voting method using bagging and boosting ensemble techniques. The test results demonstrate that the ensemble of bagging and boosting through voting exhibits the highest classification accuracy of 99.98% and a minimum false positive rate (FPR) on both datasets. Although the model building time is average which can be a tradeoff by processor speed.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.46 no.6
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• pp.44-55
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• 2009

Diagnosis of diseases using gene expression data obtained from microarray chip is an active research area recently. It has been done by general machine learning algorithms, because it is difficult to analyze directly. However, recent research results about the analysis based on the interaction between genes is essential for the gene expression analysis, which means the analysis using the traditional machine learning algorithms has limitations. In this paper, we classify the gene expression data using the hyper-network model that considers the higher-order correlations between the features, and then compares the classification accuracies. And also, we present the new hypo-network model that improve the disadvantage of existing model, and compare the processing performances of the existing hypo-network model based on general sequential processor and the improved hypo-network model implemented on parallel processors. In the experimental results, we show that the performance of our model shows improved and competitive classification performance than traditional machine learning methods, as well as, the existing hypo-network model. We show that the performance is maximized when the hypernetwork model is implemented on our parallel processors.

• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.687-689
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• 2004

As using of network increases rapidly, performance of system has been deteriorating because of the overhead and bottleneck. Nowadays, High speed I/O network standard, that is a sort of PCI Express, HyperTransport, InfiniBand, and so on, has come out to improve the limites of traditional I/O bus. The InfiniBand Architecture(IBA) provides some protocols to service the applications such as SDP, SRP and IPoIB. In our paper, We explain the architecture of IPoIB (IP over InfiniBand) and its features in channel based I/O network. And so we provide a performance evaluation result of IPoIB which is compared with current network protocol. Our experimental results also show that IPoIB is batter than TCP/IP protocol. For this test, We use the dual processor server systems and Linux Redhat 9.0 operating system.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.12 no.4
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• pp.357-364
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• 1987

In this paper we consider the performance Analysis of multistage interconnection network, which is major parts of multi-processor system. We review the Hardware configuration of STAR network system using base-line interconnection network and obtain the probability of clustering basing on analytical model. In addition, Instead of Baseline interconnection system, mentioned above, STAR network system using delta network is considered and TWO probability mentioned above is obtained, finally the comparative result is shown in the figure.

• Proceedings of the KIEE Conference
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• 2003.07d
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• pp.2483-2485
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• 2003

As design a network system that should command and response to do tasks by PLC, to make factory automation for being distributed facilities which are not guaranteed procedure, through polling method, commands are send orderly by PLC and responses are answered by each sub-unit. It make a guarantee of sequence and drive a master-slave operation in network. This method help to distribute procedure systems and make possible dividing tasks to each unit. To make this method, network protocol's format have Master or Slave ID and tasking data and Master's command or Slave unit's report. In network interpret algorithm, skip algorithm are included and it make guarantee of protecting data though network are in noise. Data that are made by this method are send to PC to transmit long-distance user by internet.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.360-361
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• 2006

This paper describes a wire and wireless network sensor for temperature and humidity measurements. The network sensor comprises PLC(Power Line Communication) and RF transmitter(433MHz) for acquiring an internal (on-board) sensor signal, and measured data is transmitted to a main processing unit. The network sensor module is consist of MEMS sensor, 10-bit A/D converter, pre-amp., gain-amp., ADUC812 one chip processor and PLC/RF transmitting unit. The temperature and humidity sensor is based on MEMS piezoelectric membrane structure and is implemented by using dual function sensor for smart home and smart building.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.51-54
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• 1998

In this paper, we describe the design of the ATM Mux/Demux circuit between BSC and MSC for IMT-2000 Network. This ATM Mux/Demux circuit culd support 155Mbps optic interface with MSC. Using the CAM and DPRAM, this circuit performs ATM cell Mux/Demux functions in the BSC. MPC 860SAR processor was used for the signaling with MSC in this design.

• Proceedings of the Korean Information Science Society Conference
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• 2002.10e
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• pp.628-630
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• 2002

기가급 이상의 고속 인터넷 접속이 필수적인 고성능 리눅스 서버 시스템에 사용되는 네트워크 프로토콜의 성능향상을 위하여, 기존의 소프트웨어 성능향상 기술과 고속 패킷 처리 전용의 네트워크 프로세서를 활용하여 고속 네트워크 프로토콜을 설계 및 구현하였다. 네트워크 정합 장치로는 인텔의 IXP1200 네트워크 프로세서가 탑재된 네트워크 카드를 사용하였고, 리눅스 커널의 TCP／UDP／IP 네트워크 프로토콜 스택 중 계층 3 IP 프로토콜 이하를 네트워크 프로세서가 처리하게 함으로써 커널의 오버헤드를 줄이고, 고속의 프로토콜 처리가 가능하게 되었다.

• Proceedings of the KIEE Conference
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• 1999.07b
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• pp.764-767
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• 1999

In this paper, to bring under robust and accurate control of auto-equipment systems which disturbance, parameter alteration of system, uncertainty and so forth exist, neural network controller called dynamic neural processor(DNP) is designed. Also, the architecture and learning algorithm of the proposed dynamic neural network, the DNP, are described and computer simulations are provided to demonstrate the effectiveness of the proposed learning method using the DNP.

• Proceedings of the Korea Inteligent Information System Society Conference
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• 2006.06a
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• pp.303-310
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• 2006

The sorting algorithms have been developed to take advantage of distributed computers. But the speedup of parallel sorting algorithms decrease rapidly with increased number of processors due to parallel processing overhead such as context switching time and inter-processor communication cost. In this paper, we propose a parallel sorting method which provides linear speedup of an optimal serial algorithm for a system with a large number of processors. This algorithm may even provide superlinear speedup for a practical system. The algorithm takes advantage of an interconnection network properties and its protocol.