• 한국통신학회:학술대회논문집
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• 한국통신학회 1991년도 추계종합학술발표회논문집
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• pp.220-224
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• 1991

Uninterruptible Power Supply(UPS) Systems are widely used in a varietyof fields as highly reliable power sources. This paper describes the operation and performance of an UPS using sinusoidal Pulse Width Modulation (PWM)techniques. A newly developed UPS adopted switching element -power TR, power MOSFET, IGBT- is introduced. Experimental results showed that sinusoidal PWM techniques have good features for UPS systems.

• ETRI Journal
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• 제31권2호
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• pp.243-245
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• 2009

A novel ultra-low-power readout circuit for a pH-sensitive ion-sensitive field-effect transistor (ISFET) is proposed. It uses an ISFET/reference FET (REFET) differential pair operating in weak-inversion and a simple current-mode metal-oxide semiconductor FET (MOSFET) translinear circuit. Simulation results verify that the circuit operates with excellent common-mode rejection ability and good linearity for a single pH range from 4 to 10, while only 4 nA is drawn from a single 1 V supply voltage.

• 한국표면공학회:학술대회논문집
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• 한국표면공학회 2012년도 춘계학술발표회 논문집
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• pp.154-155
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• 2012

In this work, we report the comprehensive study of performance enhancement of InGaAs n-MOSFET by plasma $PH_3$ p assivation. The calibrated plasma $PH_3$ passivation of the InGaA ssurface before CVD high-k dielectric deposition significantly improves interface quality, resulting in suppressed frequency dispersion in C-V, increase in drive-current with high electron mobility, and excellent thermal stability.

• JSTS:Journal of Semiconductor Technology and Science
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• 제2권3호
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• pp.233-236
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• 2002

Some measures are provided for the optimum design of specific on-resistance $R_{on}$ and breakdown-voltage $V_B$ of interdigitated CB (Composite Buffer) MOSFET, including introducing opposite type impurity into the P region near the $N_＋$contact, separating P region from N region with an oxide film, and a groove in the N region near the $P_＋$ contact. The new relationship between the $R_{on}$ and $V_B$, which proved by numerical device simulation, are more exact and minute than the qualitative results before.

• ETRI Journal
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• 제17권4호
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• pp.1-12
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• 1996

A novel body-tied silicon-on-insulator(SOI) n-channel metal-oxide-semiconductor field-effect transistor with grounded body electrode named GBSOI nMOSFET has been developed by wafer bonding and etch-back technology. It has no floating body effect such as kink phenomena on the drain current curves, single-transistor latch and drain current overshoot inherent in a normal SOI device with floating body. We have characterized the interface trap density, kink phenomena on the drain current ($I_{DS}-V_{DS}$) curves, substrate resistance effect on the $I_{DS}-V_{DS}$ curves, subthreshold current characteristics and single transistor latch of these transistors. We have confirmed that the GBSOI structure is suitable for high-speed and low-voltage VLSI circuits.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2014년도 전력전자학술대회 논문집
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• pp.89-90
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• 2014

Recently, one of the switching rectifiers, Power Factor Correction Circuit is often applied in rectification stage to get high efficient conversion of AC-DC SMPS However, it becomes important to select optimal semiconductor switch as well as to design optimal rectifier for achieving higher power conversion. We performed experiments with MOSFET, SiC and GaN FET that are widely used in 600 W Interleaved CRM PFC and include the data in this report. The results are presented for discrete semiconductor and integrated implementations of interleaved CRM PFC.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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• pp.201-202
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• 2005

The electrical characteristics of high-voltage LDMOSFET (Lateral Double-diffused MOSFET) fabricated by a CMOS technology were investigated depending on the process and design parameters. The off-state breakdown voltages of n-channel LDMOSFETs were linearly increased with increasing to the drift region length. For the case of decreasing n-well ion implant doses from $1.0\times10^{13}/cm^2$ to $1.0\times10^{12}/cm^2$, the off-state breakdown voltage was increased approximately two times, however, the on-resistance was also increased about 76%. Moreover, the on- and off-state breakdown voltages were also linearly increased with increasing the channel to n-tub spacing due to the reduction of impact ionization at the drift region.

• ETRI Journal
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• 제34권6호
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• pp.962-965
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• 2012

In this letter, we propose a new RESURF stepped oxide (RSO) process to make a semi-superjunction (semi-SJ) trench double-diffused MOSFET (TDMOS). In this new process, the thick single insulation layer ($SiO_2$) of a conventional device is replaced by a multilayered insulator ($SiO_2/SiN_x/TEOS$) to improve the process and electrical properties. To compare the electrical properties of the conventional RSO TDMOS to those of the proposed TDMOS, that is, the nitride_RSO TDMOS, simulation studies are performed using a TCAD simulator. The nitride_RSO TDMOS has superior properties compared to those of the RSO TDMOS, in terms of drain current and on-resistance, owing to a high nitride permittivity. Moreover, variations in the electrical properties of the nitride_RSO TDMOS are investigated using various devices, pitch sizes, and thicknesses of the insulator. Along with an increase of the device pitch size and the thickness of the insulator, the breakdown voltage slowly improves due to a vertical field plate effect; however, the drain current and on-resistance degenerate, owing to a shrinking of the drift width. The nitride_RSO TDMOS is successfully fabricated, and the blocking voltage and specific on-resistance are 108 V and $1.1m{\Omega}cm^2$, respectively.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.143.1-143.1
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• 2016

Ge is a promising candidate to replace Si in MOSFET because of its superior carrier mobility, particular that of the hole. However Ge oxide is thermodynamically unstable. At elevated temperature, GeO is formed at the interface of Ge and GeO2, and its formation increases the interface defect density, degrading its device performance. In search for a method to surmount the problem, we investigated Ge oxidation through an inert capped oxide layer. For this work, we prepared low doped n-type Ge(100) wafer by removing native oxide and depositing a capping layer, and show that GeO2 interface can be successfully grown through the capping layer by thermal oxidation in a furnace. The thickness and quality of thus grown GeO2 interface was examined by ellipsometry, XPS, and AFM, along with I-V and C-V measurements performed at 100K to 300K. We will present the result of our investigation, and provide the discussion on the oxide growth rate, interface state density and electrical characteristics in comparison with other studies using the direct oxidation method.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제52권4호
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• pp.179-184
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• 2003

The pulsed power system is widely used for many industries and environments. Generally, we call the "RUST", the reddish brown surface, that was made on iron surface or some other metals, when they are contacted by water and air the main substance of rust is oxide-ionization. In other words, the chemical symbol of rust on iron surface is iron oxide(III) hydrate Fe203.nH2O. In this study, we have designed and fabricated our system which has a compact pulse generator with switching MOSFET. Also we have studied the metal-oxide removing characteristics using in the atmospheric arc discharge. It has been investigated their removing characteristics by the change of charging voltage and pulse repetition rates. From this result, we can find out that the removal area Is increased from 3.80 to 8.04[$\textrm{cm}^2$], when pulse duration is increased from 100[pps] to 400[pps]. 400[pps].