• Journal of Sensor Science and Technology
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• v.20 no.4
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• pp.260-265
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• 2011

The silicon vertical hall devices are fabricated using a modified bipolar process. It consists of the thin p-layer at Si-$SiO_2$, interface and n-epi layer without $n^+$buried layer to improve the sensitivity and influence of interface effects. Experimental samples are a sensor type I with and type H without p+isolation dam adjacent to the center current electrode. The experimental results for both type show a more high current-related sensitivity than the former's vertical hall devices. The sensitivity of type H and type I are about 150 V/AT and 340 V/AT, respectively. This sensor's behavior can be explained by the similar J-FET model.

• Journal of the Korean Ceramic Society
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• v.37 no.5
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• pp.432-437
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• 2000

Thermoelectric properties of p-type SiGe alloys prepared by a RF inductive furnace were investigated. Non-doped Si80Ge20 alloys were fabricated by control of the quantity of volatile Ge. The carrier of p-type SiGe alloy was controlled by B-doping. B doped p-type SiGe alloys were synthesized by melting the mixture of Ge and Si containing B. The effects of sintering/annealing conditions and compaction pressure on thermoelectric properties (electrical conductivity and Seebeck coefficient) were investigated. For nondoped SiGe alloys, electrical conductivity increased with increasing temperatures and Seebeck coefficient was measured negative showing a typical n-type semiconductivity. On the other hand, B-doped SiGe alloys exhibited positive Seebeck coefficient and their electrical conductivity decreased with increasing temperatures. Thermoelectric properties were more sensitive to compaction pressure than annealing time. The highest power factor obtained in this work was 8.89${\times}$10-6J/cm$.$K2$.$s for 1 at% B-doped SiGe alloy.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.6
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• pp.389-393
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• 2014

A thin metal-embedding Schottky device was fabricated for an efficient photoelectric device. Semitransparent thick of 10 nm metal layers were deposited by sputtering of Ag and Ni on a Si substrate. The (111) N-type Si wafers with one-side polished, 450~500 ${\mu}m$ and resistivity $1{\sim}20{\Omega}{\cdot}cm$ were used. High rectifying ratio about 100 from Ni-Schottky device was achieved. This design would provide an effective scheme for high-performing photoelectric devices.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.11
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• pp.720-724
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• 2016

Transparent n-type metal-oxide semiconductor of $MoO_x$ was applied on a p-type Si substrate for high-performing heterojunction photodetector. The formation of $MoO_x$ on Si spontaneously established a rectifying current flow with a high rectification ratio of 1,252.3%. Under light illumination condition, n-type $MoO_x$/p-type Si heterojunction device provided significantly fast responses (rise time : 61.28 ms, fall time : 66.26 ms). This transparent metal-oxide layer ($MoO_x$) would provide a functional route for various photoelectric devices, including photodetectors and solar cells.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.133-134
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• 2008

이 논문에서는 $SiN_x$의 band gap 차이를 이용하여 MIS 구조의 메모리 소자를 제작하고 이를 분석하였다. $SiN_x$ 박막은 증착 가스비에 따라 다양한 band gap을 가지게 된다. 본 실험에서는 n-type 단결정 실리콘 기판위에 $SiH_4/NH_3$ 가스를 혼합하여 $SiN_x$ 박막을 증착하고, UV-Vis Spectrophotometer 장비를 이용하여 band gap을 구하였다. 큰 band gap을 갖는$SiN_x$ 박막을 블로킹 층에, 작은 band gap을 작는 $SiN_x$ 박막을 전하 저장 층에 사용하였다. 제작된 NNO 구조일 소자는 7.6 V의 hysteresis roof 폭과 1000초 후에 88.6 %의 retention 값을 갖는 우수한 메모리 특성을 보였다.

• Korean Journal of Materials Research
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• v.21 no.5
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• pp.273-276
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• 2011

Ultraviolet (UV) light emitting diodes (LEDs) were grown on a patterned n-type GaN substrate (PNS) with 200 nm silicon-di-oxide (SiO2) nano pattern diameter to improve the light output efficiency of the diodes. Wet etched self assembled indium tin oxide (ITO) nano clusters serve as a dry etching mask for converting the SiO2 layer grown on the n-GaN template into SiO2 nano patterns by inductively coupled plasma etching. PNS is obtained by n-GaN regrowth on the SiO2 nano patterns and UV-LEDs were fabricated using PNS as a template. Two UV-LEDs, a reference LED without PNS and a 200 nm PNS UV-LEDs were fabricated. Scanning Electron microscopy (SEM), Transmission Electron Microscopy (TEM), X-Ray Diffraction (XRD), Photoluminescence (PL) and Light output intensity- Input current- Voltage (L-I-V) characteristics were used to evaluate the ITO-$SiO_2$ nanopattern surface morphology, threading dislocation propagation, PNS crystalline property, PNS optical property and UVLED device performance respectively. The light out put intensity was enhanced by 1.6times@100mA for the LED grown on PNS compared to the reference LED with out PNS.

• Tribology and Lubricants
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• v.9 no.2
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• pp.63-69
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• 1993

The wear properties of two types of $Si_3N_4$(silicon nitride) exposed to high and low humidity were examined experimentally for various sliding speed. Bearing steel was used as the disk material at pin-on-disk type sliding. Wear rates of pressureless sintered-plus-hot-isostatic pressed Si3N4 were slightly lower than those of pressureless sintered $Si_3N_4$. It was observed that adsorbed moisture and sliding speed markedly influenced the wear properties of $Si_3N_4$. The highest wear rate was obtained under the high humidity and low sliding speed condition. As the sliding speed was increased, wear rates were decreased and the humidity effect on the wear rates of $Si_3N_4$ was lowered. The result that the $Si_3N_4$ pin showed a high wear rate under the high humidity condition was explained by the property change due to the adsorbed moisture, plowing action by the hard particles of $Fe_2O_3$ from the disk, and the corrosion effect at $Si_3N_4$ surface. Increase in sliding speed was supposed to have reduced the humidity effect on wear rate of $Si_3N_4$ by raising the temperature of both the bearing steel disk and $Si_3N_4$ pin specimen.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.2
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• pp.93-101
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• 2002

We have proposed and fabricated two lateral type field emission diodes, poly-Si emitter by utilizing the local oxidation of silicon (LOCOS) and GaN emitter using metal organic chemical vapor deposition (MOCVD) process. The fabricated poly-Si diode exhibited excellent electrical characteristics such as a very low turn-on voltage of 2 V and a high emission current of $300{\;}\bu\textrm{A}/tip$ at the anode-to-cathode voltage of 25 V. These superior field emission characteristics was speculated as a result of strong surface modification inducing a quasi-negative electron affinity and the increase of emitting sites due to local sharp protrusions by an appropriate activation treatment. In respect, two kinds of procedures were proposed for the fabrication of the lateral type GaN emitter: a selective etching method with electron cyclotron resonance-reactive ion etching (ECR-RIE) or a simple selective growth by utilizing $Si_3N_4$ film as a masking layer. The fabricated device using the ECR-RIE exhibited electrical characteristics such as a turn-on voltage of 35 V for $7\bu\textrm{m}$ gap and an emission current of~580 nA/l0tips at anode-to-cathode voltage of 100 V. These new field emission characteristics of GaN tips are believed to be due to a low electron affinity as well as the shorter inter-electrode distance. Compared to lateral type GaN field emission diode using ECR-RIE, re-grown GaN emitters shows sharper shape tips and shorter inter-electrode distance.

• Current Optics and Photonics
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• v.5 no.2
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• pp.129-133
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• 2021

This study observed the performance of an InAs/GaSb type-II superlattice photodiode with a p-i-n structure for mid-wavelength infrared detection. The 10 ML InAs/10 ML GaSb type-II superlattice photodiode was grown using molecular beam epitaxy. The cutoff wavelength of the manufactured photodiode with Si3N4 passivation on the mesa sidewall was determined to be approximately 5.4 and 5.5 ㎛ at 30 K and 77 K, respectively. At a bias of -50 mV, the dark-current density for the Si3N4-passivated diode was measured to be 7.9 × 10-5 and 1.1 × 10-4 A/㎠ at 77 K and 100 K, respectively. The differential resistance-area product RdA at a bias of -0.15 V was 1481 and 1056 Ω ㎠ at 77 K and 100 K, respectively. The measured detectivity from a blackbody source at 800 K was calculated to be 1.1 × 1010 cm Hz1/2/W at zero bias and 77 K.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.141-141
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• 2010

The effect of thermal anneal on the characteristics of structural properties and the enhancement of luminescence and photovoltaic (PV) characteristics of silicon-rich silicon-nitride films were investigated. By using an ultra high vacuum ion beam sputtering deposition, B-doped silicon-rich silicon-nitride (SRSN) thin films, with excess silicon content of 15 at. %, on P-doped (n-type) Si substrate was fabricated, sputtering a highly B doped Si wafer with a BN chip by N plasma. In order to examine the influence of thermal anneal, films were then annealed at different temperature up to $1100^{\circ}C$ under $N_2$ environment. Raman, X-ray diffraction, and X-ray photoemission spectroscopy did not show any reliable evidence of amorphous or crystalline Si clusters allowing us concluding that nearly no Si nano-cluster could be formed through the precipitation of excess Si from SRSN matrix during thermal anneal. Instead, results of Fourier transform infrared and X-ray photoemission spectroscopy clearly indicated that defective, amorphous Si-N matrix of films was changed to be well-ordered thanks to high temperature anneal. The measurement of spectral ellipsometry in UV-visible range was carried out and we found that the optical absorption edge of film was shifted to higher energy as the anneal temperature increased as the results of thermal anneal induced formation of $Si_3N_4$-like matrix. These are consistent with the observation that higher visible photoluminescence, which is likely due to the presence of Si-N bonds, from anneals at higher temperature. Based on these films, PV cells were fabricated by the formation of front/back metal electrodes. For all cells, typical I-V characteristic of p-n diode junction was observed. We also tried to measure PV properties using a solar-simulator and confirmed successful operation of PV devices. Carrier transport mechanism depending on anneal temperature and the implication of PV cells based on SRSN films were also discussed.