• Journal of the Korean Institute of Telematics and Electronics
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• v.22 no.4
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• pp.24-32
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• 1985

This paper presents the design method for multivalued logic functions using $I^2L$ circuits. First, the a비orithm that transforms delta functions into discrete functions of a truncated difference is obtained. The realization of multivalued logic circuits by this algorithm is discussed. And then, the design method is achieved by mixing discrete functions and delta functions using the modified algorithm for given multivalued truth tables. The techniques discussed here are easily extended to multi-input and multi-output logic circuits.

• The Pure and Applied Mathematics
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• v.4 no.1
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• pp.19-26
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• 1997

In this paper, we characterize the existence of fixed points of a multivalued function by the existence of complete preorder on the given domain. Also we investigate relations between the completeness of a given order and the fixed point property of some multivalued functions.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.278-281
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• 1988

This paper realizes the multi-output truncated difference circuits using current mode CMOS, and presents the algorithm designing multi - valued logic functions of a given multivalued truth tables. This algorithm divides the discrete valued functions and the interval functions, and transforms them into the truncated difference functions. The transformed functions are realized by current mode CMOS. The technique presented here is applied to MOD4 addition circuit and GF(4) multiplication circuit.

• Journal of the Korean Institute of Telematics and Electronics
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• v.15 no.5
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• pp.29-33
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• 1978

In this paper, the properties of Galois fields defined over any finite field are analysed to derive Galois switching functions and the arithmetic operation methods over any finite field are showed. The polynomial expansions over finite fields by Lagrange's interpolation method are derived and proved. The results are applied to multivalued single variable logic networks.

• East Asian mathematical journal
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• v.24 no.2
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• pp.161-168
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• 2008

We revisit the study of finding solutions of equations containing a differentiable and a continuous term on a Banach space setting [1]-[5], [9]-[11]. Using more precise majorizing sequences than before [9]-[11], we provide a semilocal convergence analysis for the generalized Newton's method as well the generalized modified Newton's method. It turns out that under the same or even weaker hypotheses: finer error estimates on the distances involved, and an at least as precise information on the location of the solution can be obtained. The above benefits are obtained under the same computational cost.

• Communications of the Korean Mathematical Society
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• v.9 no.3
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• pp.547-564
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• 1994

Let X be a real Banach space. We consider the existence of solutions of the abstract nonlinear functional evolution equation : $$ (E) \frac{du(t)}{dt} + A(t)u(t) + F(u)(t) \ni h(t), $$ $$ u(s) = x_o \in D(A(s)), 0 \leq s \leq t \leq T, $$ where u : $[s, T] \to x$ is an unknown function, ${A(t) : 0 \leq t \leq T}$ is a given family of nonlinear (possibly multivalued) operators in X, and $F : C([s, t];X) \to L^{\infty}([s, X];X)$ and $h : [s, T] \to X$ are given functions.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.13 no.5
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• pp.411-421
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• 1988

This paper offers a method to design CCD four-valued circuits using the tabular method. First, the four-valued logic function is decomposed by hand-calculation or computer program. Nest, the algorithm is derived form the tabular method based on the decomposition process to realize the DDC four-valued circuit. According to this algorithm, the two-variable four valued logic function is decomposed and realized by CCD network with four basic gates. The synthesis method in this paper proves that the number of devices and cost is considerably reduces as compared with the existing methods to realize the same logic functions.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.12
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• pp.1878-1888
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• 1990

In this paper, the input-output interconnection method of the multi-valued signal processing circuit using perfect Shuffle technique and Kronecker product is discussed. Using this method, the design method of circuit of the multi-valued Reed-Muller expansions(MRME) to be used the multi-valued signal processing on finite field GF(p**m) is presented. The proposed input-output interconnection method is shown that the matrix transform is efficient and that the module structure is easy. The circuit design of MRME on FG(p**m) is realized following as` 1) contructing the baisc gates on GF(3) by CMOS T gate, 2) designing the basic cells to be implemented the transform and inverse transform matrix of MRME using these basic gates, 3) interconnecting these cells by the input-output interconnecting method of the multivalued signal processing circuits. Also, the circuit design of the multi-valued signal processing function on GF(3\ulcorner similar to Winograd algorithm of 3x3 array of DFT (discrete fourier transform) is realized by interconnection of Perfect Shuffle technique and Kronecker product. The presented multi-valued signal processing circuits that are simple and regular for wire routing and posses the properties of concurrency and modularity are suitable for VLSI.