• 제목/요약/키워드: multiple-access system

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패킷부분재전송기법의 수율 최저 한계 (Lower Bound of Partial Packet Recovery)

  • 정충교
    • 산업기술연구
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    • 제28권A호
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    • pp.113-117
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    • 2008
  • Wireless carrier sense multiple access (CSMA) systems are widely used but show extremely different transmission efficiency according to the operation environment. Simulation or prototype deployment is needed to see the transmission efficiency of a wireless CSMA system with the partial packet retransmission scheme. The lower bound for the transmission efficiency of such a system is found mathematically in this work. This shows how much the partial packet retransmission scheme improves the transmission efficiency quantitatively. It also shows that the maximum throughput is obtained at higher offered load compared to the conventional CSMA system without the partial packet transmission. The result of this work can be applied to IEEE 802.11 networks or wireless mesh networks.

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전력 IT용 D-TRS 접속을 위한 게이트웨이 플랫폼 (Gateway Platform for Connecting D-TRS in Electric Power IT)

  • 송병권;정태의
    • 한국철도학회논문집
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    • 제12권1호
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    • pp.45-54
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    • 2009
  • TETRA는 유럽 전자 통신 표준기구인 ETSI에서 개발한 D-TRS(Digital Trunked Radio System) 표준이다. 현재 전력 IT 무선기간망으로 TETRA가 선정되었다. 기존 배전 자동화 시스템은 CDMA(Code-Division Multiple Access), WCDMA(Wideband CDMA) 모뎀을 이용한 이동통신사 무선 네트워크를 이용하고 있다. 따라서 TETRA 네트워크로 변경에 따른 게이트웨이가 필요하다. 본 논문은 TETRA 네트워크를 이용한 산업용 전력 IT 프로토콜을 전송하기 위한 임베디드 리눅스 기반 게이트웨이 플랫폼을 제안한다.

한국형 전술데이터링크(Link-K)의 무선통신 시험환경 구성 및 다중접속 프로토콜 성능분석 (The Implementation of Wireless Communication Test Environment for the Link-K System and Performance Analysis of Multiple Access Protocols)

  • 권구형
    • 한국군사과학기술학회지
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    • 제12권2호
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    • pp.170-174
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    • 2009
  • This paper describes the wireless communication test environment for the Link-K system and shows the performance analysis of multiple access protocols. The test environment consists of data generator, modem, radio sets, attenuators, and antennas. In case of both CSMA and Roll-Call protocols, throughput performance and delay are measured. And test results are analyzed. The test results would be used for communication performance analysis and network design of Link-K system.

Multi-Rate and Multi-BEP Transmission Scheme Using Adaptive Overlapping Pulse-Position Modulator and Power Controller in Optical CDMA Systems

  • Miyazawa Takaya;Sasase Iwao
    • Journal of Communications and Networks
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    • 제7권4호
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    • pp.462-470
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    • 2005
  • We propose a multi-rate and multi-BEP transmission scheme using adaptive overlapping pulse-position modulator (OPPM) and optical power controller in optical code division multiple access (CDMA) networks. The proposed system achieves the multi-rate and multi-BEP transmission by accommodating users with different values of OPPM parameter and transmitted power in the same network. The proposed scheme has advantages that the system is not required to change the code length and number of weight depending on the required bit rate of a user and the difference of bit rates does not have so much effect on the bit error probabilities (BEPs). Moreover, the difference of transmitted powers does not cause the change of bit rate. We analyze the BEPs of the four multimedia service classes corresponding to the com­binations of high/low-rates and low/high-BEPs and show that the proposed scheme can easily achieve distinct differentiation of the service classes with the simple system configuration.

DS-CDMA 통신시스템 기반에서의 새로운 SNR 성능평가 (The Advanced SNR Performance analysis for DS-CDMA Communication System)

  • 정계현;김성수
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2004년도 하계학술대회 논문집 D
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    • pp.2559-2561
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    • 2004
  • This paper proposes the new signal-to-noise ratio(SNR) that is different from the conventional signal-to-noise ratio (SNR) in direct-sequence code-division multiple-access communication system employing offset quadrature phase-shift keying(OQPSK) and using a chip waveform. The conventional SNR value is so different from a real SNR value. Therefore, we propose a new SNR equation approximated to real SNR. The multiple-access interference(MAI) in DS-CDMA communication system has an effect on SNR performance and MAI is concerned with the correlation functions of the chip waveform. For this reason, we considered all possible correlations of chip waveforms. In conclusion, the SNR value of proposed method is enclosed to the real SNR value.

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Adaptive Resource Allocation for Uplink Carrier Aggregation Scheme in LTE-A-Type Networks

  • Choi, Yonghoon;Lee, Yonggyu;Chang, Kapseok
    • ETRI Journal
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    • 제34권5호
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    • pp.759-762
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    • 2012
  • Carrier aggregation is an essential feature in the Long Term Evolution-Advanced (LTE-A) system, which allows the scalable expansion of the effective bandwidth to be delivered to user equipment (UE) through the concurrent use of radio resources across multiple component carriers (CCs). This system's optimal radio-resource use has received much attention under simultaneous access (SA) scenarios for multiple CCs (m-CCs). This letter establishes how many CCs a UE should simultaneously connect to maintain maximum uplink capacity. Under the m-CC LTE-A system, the spectral efficiency of the m-CC SA scheme ($m{\geq}2$) is compared with that of CC selection (CCS). Numerical results reveal that the 2-CC SA scheme outperforms CCS and performs almost equally to the m-CC SA scheme ($m{\geq}3$).

M진 Antipodal 초광대역 통신 시스템의 성능 (Performance of M-ary Antipodal Ultra Wideband Communication System)

  • 김종한;이정석;윤경호;김원후;김정선
    • 한국정보통신학회논문지
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    • 제5권5호
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    • pp.884-891
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    • 2001
  • 본 논문에서 초광대역 시스템의 데이터 변조를 위해 Antipodal 신호를 이용한다. 이 신호는 신호간의 유클리드 거리가 최대가 되고 상관값이 -1 또는 0이 되며, 이를 이용하여 M진 신호를 구성하는 방식으로 데이터를 변조한다. 또한 시간 도약 부호를 적용하여 다중접속 시스템을 구성한다. Antipodal 신호를 이용되는 펄스는 가우시안 모노펄스와 레일리 모노펄스이고 이를 적용하여 AWGN에서 두 종류의 펄스에 대한 오류확률, 다중접속시 사용자의 수, 전송 속도에 대해 수치해석을 하여 두 시스템의 성능을 비교, 분석하였다.

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해석적 최적 칩파형의 BER과 전송성능(Throughput) 분석 (BER and Throughput Analyses of the Analytical Optimum Chip Waveform)

  • Ryu, Heung-Gyoon;Chung, Ki-Ho;Lee, Dong-Hun
    • 한국전자파학회논문지
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    • 제13권7호
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    • pp.641-648
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    • 2002
  • The study on the chip waveform design to minimize multiple-access interference (MAI) and its performance evaluation are very important since chip waveform decides the signal quality and system capacity of the direct-sequence CDMA wireless communication system. This paper suggests the analytical chip waveform to minimize the MAI. The BER and throughput performances achieved by the proposed analytical optimum chip waveform are compared with those of the conventional chip waveforms in the Nakagami-m distribution frequency selective channel when the differential phase shift keying (DPSK) is employed in DS-CDMA system. From the numerical results, capacity and throughput are improved about 2 times and 1.4 times respectively when it is compared with the Kaiser chip waveform that is considered as one of the best in the conventional ones.

연속적 직교시간구간을 갖는 다중반송파 대역확산다중접속기술에 관한 연구 (The study of a multi-carrier SSMA system with orthogonal time duration)

  • 차재상
    • 한국정보처리학회:학술대회논문집
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    • 한국정보처리학회 2002년도 춘계학술발표논문집 (하)
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    • pp.1239-1242
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    • 2002
  • In this paper, the implementation of MAI(multiple access interference)-cancelled SSMA(spread spectrum multiple access) system using orthogonal carriers was presented. Employing the pseudo periodic spreading codes and orthogonal carriers frequency offset, proposed system have the features no MAI during a certain local time-duration. Spreading signals designed by pseudo periodic method and repetition, have zero correlation duration(ZCD) by orthogonal frequency shift method. The SSMA modem has been designed and implemented using surface-acoustic-wave(SAW) device as the matched filter of receiver. The effects of frequency offset on stability have been evaluated using computer simulation.

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고속 영상처리를 위한 다중접근 기억장치의 구현 (An Implementation of Multiple Access Memory System for High Speed Image Processing)

  • 김길윤;이형규;박종원
    • 전자공학회논문지B
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    • 제29B권10호
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    • pp.10-18
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    • 1992
  • This paper considers and implementation of the memory system which provides simultaneous access to pq image points of block(p$\times$q), horizontal vector(1$\times$pq)and/vertical vector(pq$\times$1) in 2-dimension image array, where p and q are design parameters. This memory system consists of an address calculation circuit, address routing circuit, data routing circuit, module selection circuit and m memory modules where m>qp. The address calculation circuit computes pq addresses in parallel by using the difference of addresses among image points. Extra module assignment circuit is not used by improving module selection circuit with routhing circuit. By using Verilog-XL logic simulator, we verify the correctness of the memory system and estimate the performance. The implemented system provides simultaneous access to 16 image points and is 6 times faster than conventional memory system.

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