• Title/Summary/Keyword: multilevel analysis

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Grid-Connected Photovoltaic System Based on a Cascaded H-Bridge Inverter

  • Rezaei, Mohammad-Ali;Iman-Eini, Hossein;Farhangi, Shahrokh
    • Journal of Power Electronics
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    • v.12 no.4
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    • pp.578-586
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    • 2012
  • In this paper a single-phase Cascaded H-Bridge (CHB) inverter for photovoltaic (PV) applications is presented. Based on the presented mathematical analysis, a novel controller is introduced which adjusts the inverter power factor (PF) and manipulates the distribution of the reactive power between the cells to enhance the operating range of the CHB inverter. The adopted control strategy enables tracking of the maximum power point (MPP) of distinct PV strings and allows independent control of the dc-link voltages. The proposed controller also enables the inverter to operate under heavily unbalanced PV conditions. The performance of the CHB inverter and the proposed controllers are evaluated in the PSCAD/EMTDC environment. A seven-level CHB-based grid connected laboratory prototype is also utilized to verify the system performance.

Switching pattern analysis and cell balancing of model predictive control based 9-level H-bridge multilevel converter (모델 예측 제어 기반 9레벨 H-bridge 멀티레벨 인버터 스위칭 패턴 분석 분석과 셀 밸런싱)

  • Kim, Igim;Park, Chan-bae;Kwak, Sang-shin
    • Proceedings of the KIPE Conference
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    • 2014.11a
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    • pp.121-122
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    • 2014
  • 멀티 레벨 인버터는 높은 출력 전압을 갖으며, 낮은 THD(Total harmonic distortion)를 요구하는 시스템에 적합하다. 그 중 cascaded H-brige 멀티레벨 인버터는 H-bridge 셀별 관리가 쉽고, 레벨 수를 증가시키기 쉽다는 장점 때문에 많이 이용되어 왔다. 본 논문에서는 cascaded H-bridge 인버터의 기존 PI (proportional integral) 제어 기반 PWM (pulse width modulation)기법의 스위칭 패턴과 모델 예측 제어의 스위칭 패턴을 비교하고 모델예측 제어 시 셀 별 스위칭 패턴 균형을 위한 방법을 제안한다.

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Switching Frequency Reduction Method for Modular Multi-level Converter utilizing Redundancy Sub-module (예비 서브모듈을 활용한 모듈형 멀티레벨 컨버터의 스위칭 주파수 저감 기법)

  • yoo, Seung-Hwan;Jeong, Jong-Kyou;Han, Byung-Moon
    • Proceedings of the KIPE Conference
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    • 2014.11a
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    • pp.11-12
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    • 2014
  • This paper introduces a scaled hardware model for the 10kVA, 1kV, 11-level MMC (Modular Multilevel Converter), which was manufactured in the lab based on computer simulations with PSCAD/EMTDC. Various experiments were conducted to verify the major operation algorithms of MMC. The hardware scaled-model developed in the lab can be utilized for analyzing the operation analysis and performance evaluation of MMC according to the modulation pattern and redundancy operation scheme.

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AC/DC Converter Suitable for a Pulsed Mode Switching DC Power Supply (펄스모드 스위칭 직류전원 장치에 적합한 AC/DC 켄버터)

  • Moon S. H.;Nho E. C.;Kim I. D.;Kim H. G.;Chun T. W.
    • Proceedings of the KIPE Conference
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    • 2002.07a
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    • pp.378-381
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    • 2002
  • This paper describes a novel multilevel ad/dc power converter suitable for the protection of frequent output short-circuit. The output dc power of the proposed converter can be disconnected from the load within several hundred microseconds at the instant of short-circuit fault. The rising time of the dc load voltage is as small as several hundred microseconds, and there is no overshoot of the do voltage because the dc output capacitors keep undischarged state. Analysis and simulations are carried out to investigate the operation and usefulness of the proposed scheme.

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Single Soft-Switching Multi-Level Energy Recovery Circuit Driver for Plasma Display Panel (플라즈마 디스플레이 채널을 위한 단일 소프트-스위칭 다단계 에너지 회수 회로 드라이버)

  • Jacobo Aguillon-Garcia;Moon Gun-Woo
    • Proceedings of the KIPE Conference
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    • 2006.06a
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    • pp.413-416
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    • 2006
  • The power source of an AC-PDP fur sustainer circuit is operated in high-voltage and high frequency switching during the process required to achieve the gas discharge current to generate light in a PDP panel. Since PDP has the characteristics of a pure capacitive load, the displacement current that occurs during charge and discharge generates considerable reactive power. An auxiliary circuitry called Energy Recovery Circuit (ERC) reduces the capacitive displacement current. However, this auxiliary topology also bears high stress in its components. In this paper, a multilevel voltage wave shaping sustainer circuit with auxiliary ERC characteristics for an AC-PDP driver is proposed. A comparative analysis and experimental results are presented.

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Analysis of Cascade and NPC Multilevel Inverter Output Characteristics (캐스케이드 및 NPC 방식 멀티 레벨 인버터의 출력 특성 분석)

  • Kim Y.H;Moon H.W;Kim S.H.;Kwak H.C.
    • Proceedings of the KIPE Conference
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    • 2003.07b
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    • pp.625-629
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    • 2003
  • 멀티 레벨 인버터는 고 전력 시스템에서 많이 사용되고 있다. 일반적으로 멀티 레벨 인버터는 캐스케이드와 NPC(Nuetral Point clamped) 두 가지 회로 방식이 있다. 동일한 시스템 조건에서 두 인버터를 비교하여 어느 한 인버터의 특성이 좋은가를 분석하기 위해 동일 조건하에 인버터 구조에 따라서 회로방식이 THD에 어떠한 영향을 주는지에 대해서 시뮬레이션을 통하여 살펴보고, FMI(Fundamental Modulation Index, 기본파 변조 지수)에 따라 두 회로 방식에 대한 THD 변화를 레벨 수에 따라 분석하고자 한다. 인버터에 사용되는 PWM 방식으로는 멀티 캐리어 PWM을 사용하였다.

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A Modular Bi-Directional Power Electronic Transformer

  • Gao, Zhigang;Fan, Hui
    • Journal of Power Electronics
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    • v.16 no.2
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    • pp.399-413
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    • 2016
  • This paper presents a topology for a modular power electronic transformer (PET) and a control scheme. The proposed PET consists of a cascaded H-Bridge rectifier on the primary side, a high-frequency DC/DC conversion cell in the center, and a cascaded H-Bridge inverter on the secondary side. It is practical to use PETs in power systems to reduce the cost, weight and size. A detailed analysis of the structure is carried out by using equivalent circuit. An algorithm to control the voltages of each capacitor and to maintain the power flow in the PET is established. The merits are analyzed and verified in theory, including the bi-directional power flow, variable voltage/frequency and high power factor on the primary side. The experimental results validated the propose structure and algorithm.

Analysis of output voltage characteristic according to input voltage in hybrid multilevel inverter (혼합형 멀티레벨 인버터의 입력전압원 크기에 따른 출력전압 특성분석)

  • Hong, Un-Taek;Choi, Won-Kyun;Kwon, Cheol-Soon;Hyun, Seok-Hwan;Kang, Feel-Soon
    • Proceedings of the KIPE Conference
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    • 2010.07a
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    • pp.502-504
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    • 2010
  • 본 논문에서는 풀-브리지 모듈과 양방향 스위치를 가지는 5-레벨 인버터를 다단 결합시켜 15-레벨의 출력을 형성할 수 있는 혼합형 멀티레벨 인버터를 제안한다. 제안된 회로의 입력전압원의 크기가 서로 동일한 경우와 3의 배수 형태를 가지는 경우에 대한 특성을 분석하고 시뮬레이션 및 실험을 통해 가장 효율적인 혼합형 회로 구성을 제시한다.

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Flying Capacitor DTC Drive with Reductions in Common Mode Voltage and Stator Overvoltage

  • Rahmati, Abdolreza;Arasteh, Mohammad;Farhangi, Shahrokh;Abrishamifar, Adib
    • Journal of Power Electronics
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    • v.11 no.4
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    • pp.512-519
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    • 2011
  • This paper gives a detailed analysis of the direct torque control (DTC) strategy in a five-level drive and proposes a 24-sector switching table. The known problems in low-voltage drives such as bearings currents and an overvoltage phenomenon which leads to premature failure are reviewed and the occurrence of these problems in medium voltage drives has been investigated. Then a solutions to these problems is presented and the switching table to deal with these problems is modified. Simulation and experimental results on a 3kVA prototype confirm the proposed solution. In implementing the above strategy a TMS320F2812 is used.

Bit Error Probability Analysis of PW/CDMA System in AWGN Noise Environments (펄스폭변조 다중채널 DS/CDMA 시스템의 AWGN 환경하에서의 비트오율 성능 분석)

  • 김명진;오종갑;김성필
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2001.06a
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    • pp.9-12
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    • 2001
  • In DS/CDMA system the number of output signal levels increases as multi-channel signals are summed, hence the power amplifier with high linearity is required. PW/CDMA is a transmission technique that performs pulse width modulation on the multilevel signal synthesized from multiple channel data. In PW/CDMA system the signal level is maintained to be binary, hence the modulation and demodulation circuits become simple. In this paper we derive the probability of bit error of the PW/CDMA system in AWGN environment. The results are compared with DS/CDMA system and are verified through the computer simulations.

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