• 제목/요약/키워드: multi-layer dielectric

검색결과 131건 처리시간 0.026초

적층 폴디드 구조를 이용한 GPS용 마이크로스트립 안테나 (Microstrip Antenna using Multi-layer and Folded Structure for GPS Application)

  • 금재민;우종명
    • 한국ITS학회 논문지
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    • 제16권2호
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    • pp.171-179
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    • 2017
  • 본 논문에서는 비행체 탑재용으로 안테나의 소영화를 위해 GPS용 적층형 폴디드 마이크로스트립 패치 안테나를 제안하였다. 기존의 소형화된 마이크로스트립 패치 안테나는 고비 유전율의 유전체를 이용한 소형화로 유전체 손실에 의해 대역폭이 작아지고 효율저하가 발생하게 된다. 제안된 안테나는 기존의 단점을 보완하는 소형화를 위해 먼저 Rogers사 TMM 10i(비유전율=9.8, 손실탄젠트=0.002) 유전체를 이용하였고, 다음으로 perturbation 효과를 적용시킨 방사소자를 유전체 표면에 폴디드 구조로 구현하였다. 이렇게 GPS $L_1$대역에서 설계된 안테나의 방사소자 크기는 $20.3mm{\times}19.93mm$를 가지며, 기본 반파장 마이크로스트립 패치 원편파 안테나보다 94.2% 소형화 특성을 얻었다. 또한 -10 dB 대역폭의 경우 32.3 MHz(2.05%), 3 dB 축비 대역폭의 경우 6.7 MHz(0.43%)로 측정되었다. 방사패턴 측정 결과 최대이득은 x축 편파에서 0.56 dBi, y축 편파에서 1.23 dBi을 얻었다.

플라즈모닉스 현상을 이용한 전반사 기반 다층 유전체 박막 센서의 특성 분석 (Characteristics Analysis of Total Internal Reflection-based Dielectric Multi-layer Sensor Using Plasmonics Phenomena)

  • 김홍승;이태경;김두근;정유라;오금윤;이병현;기현철;최영완
    • 한국전기전자재료학회논문지
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    • 제25권7호
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    • pp.516-520
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    • 2012
  • In this paper, we have theoretically analyzed and designed a dielectric multi-layer sensor with a SPR (surface plasmon resonance) using analytical calculation and FDTD (finite difference time-domain) methods. The proposed structure is composed of periodic layer and thin metal film. It has many advantages. One of that is a high sensitivity of the SPR. Another is a high Q-factor of the characteristics in the PhC (photonic crystals) micro-cavity structure. The incident light has double resonance characteristics, because the filtered light by PhC structure, dielectric multi-layer, is met the thin metal film for SPR effect. We have also observed the change of resonance characteristics according to the variation of effective index on the metal film.

Design and Fabrication of a Phase Shifter RFIC using a Tunable Multi-layer Dielectric

  • 이영철
    • 한국산업정보학회논문지
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    • 제19권2호
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    • pp.45-49
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    • 2014
  • In this work, a phase shifter radio-frequency integrated chip (RFIC) using a simple all-pass network is presented. As a tuning element of the phase shifter RFIC, tunable capacitors with a multi-layer dielectric of a para-/ferro-/para-electrics using a high tunable BST ferroelectric and a low-loss BZN paraelectric thin film were utilized. In order to evaluate and analyze the fabricated phase shifter RFIC, the same elements such as an inductor and capacitor integrated into it are also fabricated and tested. The designed phase shifter RFIC was fabricated on a quartz substrate in the size of $1.16{\times}1.21mm^2$. As the test results, the maximum phase difference of $350^{\circ}$ is obtained at 15 V and its tuning frequency bandwidth is 90 MHz from 2.72 to 2.81GHz.

전도성 유전기판을 이용한 다층기판에서의 Simultaneous Switching Noise 감소 기법 (Simultaneous Switching Noise Reduction Technique in Multi-Layer Boards using Conductive Dielectric Substrate)

  • 김성진;전철규;이해영
    • 마이크로전자및패키징학회지
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    • 제6권4호
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    • pp.9-14
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    • 1999
  • 본 논문에서는 고속 디지털 회로에서 발생하는 Simultaneous Switching Noise (SSN)를 감소하기 위한 다층 기판 구조를 제안하고 시간 영역 시간 차분법 (Finite Difference Time Domain Method)을 이용하여 그 효과를 확인하였다. 제안된 구조는 전원 평면과 접지 평면사이에 전도성 유전체를 전체 또는 부분적으로 삽입한 구조로 혼신 전압파의 크기를 각각 최대 85%, 55% 까지 줄일 수 있어 고속 고성능 디지털 시스템 구현에 효과적으로 적용될 수 있다.

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전도성 운전기판을 이용한 다층기판에서의 Simultaneous Switching Noise 감소 기법 (Simultaneous Switching Noise Reduction Technique in Multi-Layer Boards using Conductive Dielectric Substrate)

  • 김성진;전철규;이해영
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 1999년도 추계 기술심포지움 논문집
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    • pp.33-36
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    • 1999
  • In this paper, we proposed a simultaneous switching noise(SSN) reduction technique in muti-layer beards(MLB) for high-speed digital applications and analyzed them using the Finite Difference Time Domain(FDTD) method. The new method by conductive dielectric substrates reduces SSN couplings and resonances, significantly, which cause series malfunctions in the modem high-speed digital applications.

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비정질 셀레늄의 누설전류 저감을 위한 다층구조 제작 및 특성 평가 (The Multi-layer Fabrication and Characteristic Performance for Dark Current Reduction of Amorphous Selenium)

  • 박지군;강상식;석대우;이형원;남상희
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 하계학술대회 논문집 Vol.3 No.2
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    • pp.849-852
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    • 2002
  • Recently, amorphous selenium is used as x-ray conversion material for flat-panel x-ray detector. In this paper, we investigated the effect of breakdown under high voltage and leakage current in PN-type multi-layer structure based on p-type a-Se and n-type conductive thin film. Experimental results show that the multi-layer based detector reduced leakage current because n-type CeO2 conductive layer prevent from hole injection into a-Se layer from collection electrode, Also, the breakdown voltage was improved by dielectric layer between a-Se and top electrode.

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Design Method of Tunable Pixel with Phase-Change Material for Diffractive Optical Elements

  • Lee, Seung-Yeol;Kim, Han Na;Kim, Yong Hae;Kim, Tae-Youb;Cho, Seong-Mok;Kang, Han Byeol;Hwang, Chi-Sun
    • ETRI Journal
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    • 제39권3호
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    • pp.390-397
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    • 2017
  • In this paper, we propose a scheme for designing a tunable pixel layer based on a $Ge_2Sb_2Te_5$ (GST) alloy thin film. We show that the phase change of GST can significantly affect the reflection characteristic when the GST film is embedded into a dielectric encapsulation layer. We investigate the appropriate positions of the GST film within the dielectric layer for high diffraction efficiency, and we prove that they are antinodes of Fabry-Perot resonance inside the dielectric layer. Using the proposed scheme, we can increase the diffraction efficiency by about ten times compared to a bare GST film pixel, and 80 times for the first-to-zeroth-order diffraction power ratio. We show that the proposed scheme can be designed alternatively for a broadband or wavelength-selective type by tuning the dielectric thickness, and we discuss a multi-phase example with a double-stack structure.

CuO가 PSN-PZT세라믹스의 저온소결 특성에 미치는 영향 (Effects of CuO on Low-temperature Sintering Characteristics of PSN-PZT System Ceramics)

  • 류주현;우원희;오동언;정영호;정광현;정문영;정회승
    • 한국전기전자재료학회논문지
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    • 제16권12S호
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    • pp.1200-1204
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    • 2003
  • In this study, in order to develop the low temperature sintering ceramics for multi-layer piezoelectric transformer, PSN-PZT system ceramics were manufactured as a function of CuO addition and their dielectric and piezoelectric characteristics were Investigated. CuO addition facilitated densification at low temperature due to the effect of Cu$_2$O-PbO liquid phase. Through the X-ray diffraction pattern study, absence of second phase unwanted was confirmed. Among the specimen to which CuO was added, the 0.6wt% CuO added specimen sintered at 900$^{\circ}C$ and 920$^{\circ}C$ showed the most excellent mechanical quality factor and electromechanical coupling factor, respectively. Besides the densification accelerator, CuO acted as a accepter and increased mechanical quality. Compared with the specimen with no addition sintered at 1150$^{\circ}C$ , the 0.6wt% CuO added specimen sintered at 920$^{\circ}C$ showed the appropriate dielectric and piezoelectric characteristics for multi-layer piezoelectric transformer.

960MHz 대역 다층구조 VCO 설계 (960MHz band multi-layer VCO design)

  • 이동희;정진휘
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 추계학술대회 논문집 Vol.14 No.1
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    • pp.410-413
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    • 2001
  • In this paper, we present results of this that design of the multi-layer VCO(Voltage Controlled Oscillator), which is composed of the resonation circuit and the oscillation circuit, using EM simulator and nonlinear RF circuit simulator. EM simulator is used for acquiring EM(Electromagnetic) characteristics of conductor pattern as well as designing multi-layer VCO, Acquired EM characteristics of the circuit pattern was used like real components at nonlinear RF circuit simulator. Finally VCO is simulated at nonlinear RF circuit simulator. The material for the circuit pattern was Ag and the dielectric was DuPont #9599, which is applied for L TCC process. The structure is constructed with 4 conducting layer. Simulated results showed that the output level was about 1[dBm], the phase noise was 102 [dBc/Hz] at 30[kHz] offset frequency, the harmonics -8dBc, and the control voltage sensitivity of 30[MHz/V] with a DC current consumption of l0[mA]

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960MHz대역 다층구조 VCO 설계 (960MHz band multi-layer VCO design)

  • 이동희;정진휘
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 추계학술대회 논문집
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    • pp.410-413
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    • 2001
  • In this paper, we present results of this that design of the multi-layer VCO(Voltage Controlled Oscillator), which is composed of the resonation circuit and the oscillation circuit, using EM simulator and nonlinear RF circuit simulator. EM simulator is used for acquiring EM(Electromagnetic) characteristics of conductor pattern as well as designing multi-layer VCO, Acquired EM characteristics of the circuit pattern was used like real components at nonlinear RF circuit simulator. Finally VCO is simulated at nonlinear RF circuit simulator. The material for the circuit pattern was Ag and the dielectric was Dupont #9599, which is applied for LTCC process. The structure is constructed with 4 conducting layer. Simulated results showed that the output level was about 1[dBm], the phase noise was 102 [dBc/Hz] at 30[kHz] offset frequency, the harmonics -8dBc, and the control voltage sensitivity of 30[MHz/V] with a DC current consumption of 10[mA].

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