• 제목/요약/키워드: multi-core platform

검색결과 73건 처리시간 0.027초

Development of Vehicle LDW Application Service using AUTOSAR Platform on Multi-Core MCU (멀티코어 상의 AUTOSAR 플랫폼을 활용한 차량용 LDW 응용 서비스 개발)

  • Park, Mi-Ryong;Kim, Dongwon
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • 제14권4호
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    • pp.113-120
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    • 2014
  • In this paper, we examine Asymmetric Multi-Processing Environment to provide LDW service. Asymmetric Multi-Processing Environment consists of high-speed MCU to support rapid image processing and low-speed MCU for controlling with other ECU at the control domain. Also we designed rapid image process application and LDW application Software Component(SW-C) according to the development process rule of AUTOSAR. To communicate between two MCUs, timer based polling based IPC was designed. Also to communicate with other ECUs(Electronic Control Units), we designed CAN messages to provide alarm information and receiving CAN message to catch the Turn signal. We confirm the possibility of the various ADAS development using an Asymmetric Multi-Processing Environment and AUTOSAR platform. We also expect providing ISO 26262 functional safety.

The Study of Distributed Processing for Graphics Rendering Engine Based on ARINC 653 Multi-Core System (ARINC 653 멀티코어 기반 그래픽스 렌더링 엔진 분산처리방안 연구)

  • Jung, Mukyoung
    • Journal of Aerospace System Engineering
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    • 제13권5호
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    • pp.1-8
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    • 2019
  • Recently, avionics has been migrating from a federated architecture to an integrated modular architecture based on a multi-core to reduce the number of systems, weight, power consumption, and platform redundancy. The volume of data which must bo provided to the pilot through the display device has increased, because an integrated single device performs multiple functions. For this reason, the volume of data processed by the graphic processor within a fixed operation period has increased. In this paper, we provide a multi-core-based rendering engine in to perform more graphics processing within a fixed operation period. We assume the proposed method uses a multi-core-based partitioning operating system using the AMP (Asymmetric Multi-Processing) architecture.

Multi-Threaded Parallel H.264/AVC Decoder for Multi-Core Systems (멀티코어 시스템을 위한 멀티스레드 H.264/AVC 병렬 디코더)

  • Kim, Won-Jin;Cho, Keol;Chung, Ki-Seok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • 제47권11호
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    • pp.43-53
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    • 2010
  • Wide deployment of high resolution video services leads to active studies on high speed video processing. Especially, prevalent employment of multi-core systems accelerates researches on high resolution video processing based on parallelization of multimedia software. In this paper, we propose a novel parallel H.264/AVC decoding scheme on a multi-core platform. Parallel H.264/AVC decoding is challenging not only because parallelization may incur significant synchronization overhead but also because software may have complicated dependencies. To overcome such issues, we propose a novel approach called Multi-Threaded Parallelization(MTP). In MTP, to reduce synchronization overhead, a separate thread is allocated to each stage in the pipeline. In addition, an efficient memory reuse technique is used to reduce the memory requirement. To verify the effectiveness of the proposed approach, we parallelized FFmpeg H.264/AVC decoder with the proposed technique using OpenMP, and carried out experiments on an Intel Quad-Core platform. The proposed design performs better than FFmpeg H.264/AVC decoder before the parallelization by 53%. We also reduced the amount of memory usage by 65% and 81% for a high-definition(HD) and a full high-definition(FHD) video, respectively compared with that of popular existing method called 2Dwave.

Design of IMS solution based on Embedded (임베디드 기반의 IMS 솔루션 설계)

  • Kim, Sam-Taek
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • 제14권4호
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    • pp.39-44
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    • 2014
  • IMS(IP Multi-Media Subsystem) base on the IP service platform which can offer multimedia as the voice, audio, video, and data is service platform. In 3G mobile communication in the early day, IMS had a suggestion for supporting to multimedia service in the 3GPP. But now It is broadly substituting in the IPTV, wire phone company and it is substituted in internet platform base on the soft-switch in currently. Especially nowadays, 4G LTE in a mobile communication company is rapidly growing in market. Therefore, in this study, we had designed to the main prosser that can admit to 1,000 user over and SIP gateway which can link the IMS 코어 that can link SIP Device which adopt the standard protocol on the SIP.

A Study of the Development Test and Evaluation and Verification Procedure of a Multi-Mission USV, M-Searcher (복합임무 무인수상정의 개발시험평가 및 검증절차에 관한 고찰)

  • Park, hin-Bae;Kim, Won-Jae;Lee, Kurnchul
    • Journal of Ocean Engineering and Technology
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    • 제32권5호
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    • pp.402-409
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    • 2018
  • This paper describes the plan and procedure of a development test and evaluation that will be performed to verify the performance and technology of multi-mission unmanned surface vehicles (MMUSVs). In order to verify the design requirement of MMUSVs, we designed and manufactured the common platform of MMUSVs, which have an overall length of8.4 m, a displacement of 3,100 kg, and a speed of more than35 kts. The platform is equipped with several sub-systems, including radar and an EOTS/IRS. The EOTS/IRS, along with the search radar, is used for effective detection, identification, and targeting. The core technologies of MMUSV for DT&E will be investigated. The common platform design technologies, remote operating and control system technologies, autonomous navigation technologies, and unmanned operational technology of sensors and equipment will be studied for the development of the MMUSV's core technologies. The system will be able to make precise observations and track targets both manually and automatically during day and night conditions. Currently, the verification tests for each of the technologies and for the integrated system are in the pipeline for DT&E, which will be performed next year. Also, software reliability and life tests will be performed.

Design and Implementation of the Smart Virtual Machine for Smart Cross Platform (스마트 크로스 플랫폼을 위한 스마트 가상기계의 설계 및 구현)

  • Han, Seong-Min;Son, Yun-Sik;Lee, Yang-Sun
    • Journal of Korea Multimedia Society
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    • 제16권2호
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    • pp.190-197
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    • 2013
  • Since domestic and foreign platform companies and mobile carriers adopt and use different kinds of smart platforms, developers should develop or convert contents according to each smart platform to provide a single smart content for customers. It takes long time and a lot of money to convert the conventional smart contents in order to serve other smart platforms. For the reason, more attention has been paid on Smart Cross Platform or Hybrid Platform, the core technologies of OSMU(One Source Multi Use) in which, once a program is coded, it can be executed in any platforms regardless of development languages. As a result, PhoneGap and HTML5 based Sencha Touch have been introduced. In this paper, we developed the smart virtual machine, which is built in smart cross platform based smart devices, unlike Android, iOS, Windows Phone devices being dependent of platforms, and helps to download and execute applications, being independent of platforms. the smart virtual machine supports C/C++, and Java language, being differentiated from JVM by sun microsystems that supports only Java language and .NET framework by microsoft that supports only C, C++ and C#. Therefore, it provides contents developers with the environment where they can get a wide range of options in choosing a language and develop smart contents.

Web3 Business Model Innovation Approach and Cases of Korean Game Giants

  • Song, Minzheong
    • International Journal of Internet, Broadcasting and Communication
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    • 제16권1호
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    • pp.241-252
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    • 2024
  • We analyze the types of Web3 business model innovation (BMI) of the six major Korean game companies by market size. As a result of the analysis, Nexon is watched as the adapter. It introduces blockchain (BC) layer 2, 'Polygon' to the extended ecosystem such as the creator's secondary creation, item utility, and compensation experience using the existing core intellectual property (IP). KakaoGames and Neowiz are watched as the adventurers. KakaoGames introduces BC layer 2, 'Polygon' and 'Near Protocol' to various experiments using tokenomics models in casual games and massively multiplayer online role-playing games (MMORPGs) using several existing popular IPs. Neowiz also introduces BC layer 2, 'Polygon' and 'Avalanche' to the IntellaX platform using existing game IPs. As the reinventor, Netmable positions as a game publisher that releases third-party games based on multi-chain infrastructure such as Klaytn, BNB Chain, Near Protocol, Aptos Foundation, and introduces BC to new core IPs. Finally, there are Wemade and Com2us as the mavericks. They aim to be the Web3 platform operators that create a BC layer 1 ecosystem and provide services that encompass BC games, GameFi, and non-fungible tokens (NFTs). Here are the implications of the four types of BMI. In terms of infrastructure, Nexon, KakaoGames, and Neowiz try to introduce a part of cross-chain, whereas Netmable tries to move toward a complete multi-chain strategy, and Wemade and Com2us also try to consider multi-chain, even if they have the full BC introduction. In terms of defending against market decline, Nexon and Netmable have a different position. Nexon which has a greater market dominance, only tries to continuously experiment, but Netmable is aggressively focusing on monetizing new products. Attacks on growth aspirations also show two different positions. KakaoGames and Neowiz only try to aggressively explore, while WeMade and Com2us try to set new standards for industrial innovation.

8K Programmable Multimedia Platform based on SRP (SRP 를 기반으로 하는 8K 프로그래머블 멀티미디어 플랫폼)

  • Lee, Wonchang;Kim, Minsoo;Song, Joonho;Kim, Jeahyun;Lee, Shihwa
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 한국방송공학회 2014년도 하계학술대회
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    • pp.163-165
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    • 2014
  • In this paper, we propose a world's first programmable video processing platform for video quality enhancement of 8K ($7680{\times}4320$) UHD (Ultra High Definition) TV at 60 frames per second. To support huge computation and memory bandwidth of video quality enhancement for 8K resolution, the proposed platform has unique features like symmetric multi-cluster architecture for data partitioning, ring data-path between clusters to support data pipelining, on-the-fly processing architecture to reduce DDR bandwidth, flexible hardware to accelerating common kernel in video enhancement algorithms. In addition to those features, general programmability of SRP (Samsung reconfigurable processor) as main core of the proposed platform makes it possible to upgrade continuously video enhancement algorithm even after the platform is fixed. This ability is very important because algorithms for 8K DTV is under development. The proposed sub-system has been embedded into SoC (System on Chip) and new 8K UHD TV using the programmable SoC is expected at CES2015 for the first time in the world.

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A Low Power Design of H.264 Codec Based on Hardware and Software Co-design

  • Park, Seong-Mo;Lee, Suk-Ho;Shin, Kyoung-Seon;Lee, Jae-Jin;Chung, Moo-Kyoung;Lee, Jun-Young;Eum, Nak-Woong
    • Information and Communications Magazine
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    • 제25권12호
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    • pp.10-18
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    • 2008
  • In this paper, we present a low-power design of H.264 codec based on dedicated hardware and software solution on EMP(ETRI Multi-core platform). The dedicated hardware scheme has reducing computation using motion estimation skip and reducing memory access for motion estimation. The design reduces data transfer load to 66% compared to conventional method. The gate count of H.264 encoder and the performance is about 455k and 43Mhz@30fps with D1(720x480) for H.264 encoder. The software solution is with ASIP(Application Specific Instruction Processor) that it is SIMD(Single Instruction Multiple Data), Dual Issue VLIW(Very Long Instruction Word) core, specified register file for SIMD, internal memory and data memory access for memory controller, 6 step pipeline, and 32 bits bus width. Performance and gate count is 400MHz@30fps with CIF(Common Intermediated format) and about 100k per core for H.264 decoder.

Development of Multi-applications for Data Broadcasting (데이터방송 멀티 애플리케이션 개발)

  • Kim Hyun-Soon;Kwon Jae-Kwang;Kang Dae-Kap
    • Journal of Broadcast Engineering
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    • 제11권1호
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    • pp.107-115
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    • 2006
  • In the environment of single application data broadcasting, only one application can be serviced at a specific time on one channel. To overcome this, we developed the structure and the method of operation for multi-applications which are fully conformant to the ACAP (Advanced Common Application Platform), and modified data broadcasting system to support multi-applications. In multi-application environment, broadcasters can service multiple applications simultaneously at a specific airtime on one channel so users can enjoy services selectively according to their preferences. In this paper, we present an example of multi-application service which was developed to make an experiment before servicing them to users on the air. The core of the multi-application is a manager application which manages other ordinary applications, so we describe the function and structure of the manager application, and then present the experimental results to show that the proposed method is the proper model for multi-applications.