• Nuclear Engineering and Technology
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• v.55 no.8
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• pp.2952-2965
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• 2023

Advanced reactors, such as Small Modular Reactors or existing Nuclear Power Plants, often use Field Programmable Gate Array (FPGA) based controllers in new Instrumentation and Control (I&C) system architectures or as an alternative to existing analog-based I&C systems. Compared to CPU-based Programmable Logic Controllers (PLCs), FPGAs offer better overall performance. However, programming functions on FPGAs can be challenging due to the requirement for a hardware description language that does not explicitly support the operation of real numbers. This study aims to implement the Reactor Trip (RT) functions of the existing analog-based Reactor Protection System (RPS) using FPGAs. The RT equations for Overtemperature delta Temperature and Overpower delta Temperature involve dynamic compensators expressed with the Laplace transform variable, 's', which is not directly supported by FPGAs. To address this issue, the trip equations with the Laplace variable in the continuous-time domain are transformed to the discrete-time domain using the Z-transform. Additionally, a new operation based on a relative value for the equation range is introduced for the handling of real numbers in the RT functions. The proposed approach can be utilized for upgrading the existing analog-based RPS as well as digitalizing control systems in advanced reactor systems.

• Korean Journal of Construction Engineering and Management
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• v.20 no.4
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• pp.114-125
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• 2019

Off-Site Construction (OSC) is a new construction method based on factory production. OSC (Off-Site Construction) is a new construction method based on factory production. Researches such as OSC-related design and production standardization, transport methods are actively conducted in the U.S., UK and other parts of the world as this new method has an edge over existing methods in terms of productivity, economy and quality. As the emergence of this new area requires reasonable management, an analysis of the scope of construction project management is required accordingly. Therefore, this research analyzed the study trends and relationships at the CM/PM range's "Operation level" to identify areas of study, relationship between studies and deficiencies in current research. This study carried out a comprehensive literature review of the OSC (CM/PM) research by analyzing 94 papers in Operation level as of September 3, 2018, and the analysis results are as follows. (1) Working stage level researches have been increasing rapidly since 2006. (2) Non-volumetric type is contributing most significantly at work stage level. In the building sector, it has been identified that problems such as residential: living, quality issues, non-residential: economic difficulties, factory: productivity problems have been addressed. (4) The Non-volumetric pre-assembly type dealt with the economic feasibility of residential and non-residential buildings, whereas the modular type was studied in regards to assembly quality. (5) From 2006, project management areas (e.g., quality, human resources, risks) have been expanded. It is expected that this research will help find new areas of research for OSC. If the analysis is carried out to the level of the industrial, corporate and project phases in the future, it is deemed that the overall research flow and area of the OSC industry can be identified.

• Proceedings of the KSR Conference
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• 2011.05a
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• pp.1195-1201
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• 2011

Since the release of safety standard IEC 61508 which defines functional safety of electronic safety-related systems, SIL(Safety Integrity Level) certification for railway systems has gained lots of attention lately. In this paper, we propose a new design technique of the computer board for train control systems with high reliability and safety. The board is designed with TMR(Triple Modular Redundancy) using a certified SIL3 Texas Instrument(TI)'s TMS570 MCU(Micro-Controller Unit) to guarantee safety and reliability. TMR for the control device is implemented on FPGA(Field Programmable Gate Array) which integrates a comparator, a CAN(Controller Area Network) communication module, built-in self-error checking, error discriminant function to improve the reliability of the board. Even if a malfunction of a processing module occurs, the safety control function based on the proposed technique lets the system operate properly by detecting and masking the malfunction. An RTOS (Real Time Operation System) called FreeRTOS is ported on the board so that reliable and stable operation and convenient software development can be provided.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.5
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• pp.2680-2700
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• 2017

Finite field arithmetic over GF($2^m$) is used in a variety of applications such as cryptography, coding theory, computer algebra. It is mainly used in various cryptographic algorithms such as the Elliptic Curve Cryptography (ECC), Advanced Encryption Standard (AES), Twofish etc. The multiplication in a finite field is considered as highly complex and resource consuming operation in such applications. Many algorithms and architectures are proposed in the literature to obtain efficient multiplication operation in both hardware and software. In this paper, a modified serial multiplication algorithm with interleaved modular reduction is proposed, which allows for an efficient realization of a sequential polynomial basis multiplier. The proposed sequential multiplier supports multiplication of any two arbitrary finite field elements over GF($2^m$) for generic irreducible polynomials, therefore made versatile. Estimation of area and time complexities of the proposed sequential multiplier is performed and comparison with existing sequential multipliers is presented. The proposed sequential multiplier achieves 50% reduction in area-delay product over the best of existing sequential multipliers for m = 163, indicating an efficient design in terms of both area and delay. The Application Specific Integrated Circuit (ASIC) and the Field Programmable Gate Array (FPGA) implementation results indicate a significantly less power-delay and area-delay products of the proposed sequential multiplier over existing multipliers.

• ETRI Journal
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• v.19 no.3
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• pp.141-168
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• 1997

The base station (BS) in the CDMA Mobile System (CMS) connects calls through the radio interface and is designed to provide mobile subscribers with high quality service in spite of mobile subscribers motions. The BS consists of multiple base station transceiver subsystems (BTSs), a base station controller (BSC) and a base station manager (BSM). This paper is concerned with the BSC and the BSM. The BSC is located between the BTSs and the mobile switching center (MSC) connected with the public network, and to mobile subscribers via the BTSs. The BSM provides operator-interfaces per the BS and takes responsibility of operation and maintenance (OAM) of the BS. Design of the BSC is based on two module types: functional module and unit module. The functional module is used to support new services easily and the unit module to increase the system capacity economically. Both modular types are easily achieved by inserting the corresponding modules to the system. Particularly, in order to efficiently support the soft handover which is one of CDMA superior advantages, the BSC adopts a large high-speed Packet switch connecting up to 512 BTSs, and thus mobile subscribers can be provided with soft handover in high probability. The BSM is based on a commercial workstation to support OAM functions efficiently and guarantee high reliability of the functions. The BSM uses graphical user interface (GUI) for efficient OAM functions of the BS.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.2
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• pp.96-105
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• 2021

Large-scale power converters consist of series or parallel module combinations. In these modular converter systems, the interleaving technique can be applied to improve capacitor reliability by reducing the ripple of the I/O current in which each module operates as a phase difference. However, when applying the interleaving technique for conventional three-level boost converters, the short-circuit period of the converter can be an obstacle. Such problem is caused by the absence of a low-level inductor of the conventional three-level boost converter. To solve this problem, a three-level boost converter with a low-level inductor is proposed and analyzed to enable interleaved operation. In the proposed circuit, the current ripple of the output capacitor depends on the neutral point connections between the modules. In this study, the ripple current is analyzed by the neutral point connections of the three-level boost converter that has a low-level inductor, and the effectiveness of the proposed circuit is proven by simulation and experiment.

• The KIPS Transactions:PartC
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• v.8C no.1
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• pp.32-40
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• 2001

In this paper, we propose a high-speed modular multiplication algorithm which revises conventional Montgomery's algorithm. A hardware architecture is also presented to implement 1024-bit RSA cryptosystem for digital signature based on the proposed algorithm. Each iteration in our approach requires only one addition operation for two n-bit integers, while that in Montgomery's requires two addition operations for three n-bit integers. The system which is modelled in VHDL(VHSIC Hardware Description Language) is simulated in functionally through the use of $Synopsys^{TM}$ tools on a Axil-320 workstation, where Altera 10K libraries are used for logic synthesis. For FPGA implementation, timing simulation is also performed through the use of Altera MAX + PLUS II. Experimental results show that the proposed RSA cryptosystem has distinctive features that not only computation speed is faster but also hardware area is drastically reduced compared to conventional approach.

• Journal of IKEEE
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• v.24 no.2
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• pp.392-402
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• 2020

This paper proposes a solar tracking system without photo-sensors. The system can be classified into four modules: Solar Tracking, MPPT, ESS, and Real-Time Monitoring. Nine solar panels, as a basic unit, are adopted with grid structures of different heights to reduce wind influence and to enable solar tracking without photo-sensors. The low-cost MCU implements MPPT method which generates PWM switching signal for boost converter. The unit of ESS consists of three-series and four-parallel lithium-ion batteries in order to enable monitoring for abnormalities in temperature and electrical characteristics of battery. Four MCUs used in the system consists of two AVR Atmega128, and two Raspberry PI, and they exchanges operation informations. Experimental results of the proposed system show the solar tracking performance, the possibility of on-site and remote monitoring and the convenience of maintenance based on IoT technology.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.1C
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• pp.131-139
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• 2008

This paper presents a scalable dual-field Montgomery multiplier based on a new multi-precision carry save adder(MP-CSA), which operates in both types of finite fields GF(p) and GF($2^m$). The new MP-CSA consists of two carry save adders(CSA). Each CSA is composed of n = [w/b] carry propagation adders(CPA) for a modular multiplication with w-bit words, where b is the number of dual field adders(DFA) in a CPA. The proposed Montgomery multiplier has roughly the same timing complexity compared with the previous result, however, it has the advantage of reduced chip area requirements. In addition, the proposed circuit produces the exact modular multiplication result at the end of operation unlike the previous architecture. Furthermore, the proposed Montgomery multiplier has a high scalability in terms of w and m. Therefore, it can be used to multiplier over GF(p) and GF($2^m$) for cryptographic applications.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.2
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• pp.394-402
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• 2010

At a recent, enterprises based on online-service are established because of rapid growth of information network. These enterprises collect personal information and do customer management. If customers use a paid service, company send billing information to customer and customer pay it. Such circulation and management of information is big issue but most companies don't care of information security. Actually, personal information that was managed by largest internal open-market was exposed. For safe customer information management, this paper proposes the method that decrease load of RSA cryptography algorithm that is commonly used for preventing from illegal attack or hacking. The method for decreasing load was designed by Binary NAF Method and it can operates modular Exponentiation rapidly. We implemented modular Exponentiation algorithm using existing Binary Method and Windows Method and compared and evaluated it.