• Title/Summary/Keyword: modular device

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전동차 시뮬레이터의 기술사양 분석과 시뮬레이션 기술의 이식성에 관한 고찰

  • 윤석준
    • Proceedings of the Korea Society for Simulation Conference
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    • 1998.03a
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    • pp.78-85
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    • 1998
  • The paper introduces major technical specifications of the Line II railway simulators of Pusan City in Korea. Comparing design specifics of the railway simulators with of the light aircraft Flight Training Device(FTD, the paper reveals commonality of implementation technologies applied to both simulators: Overall configurations and design philosophies are basically the same. In both programs VMEbus computing systems with UNIX are adapted as backbones of the simulators. It is found that the railway simulators are less stringent in real-time requirements than the aircraft FTD, and the railway simulators are designed to be more event-driven and object-oriented. The experiences show that models may be diverse depending on the objects but implementation technologies are about the same. Maximizing portability of implementation technologies is a matter of an organizations strategy of adopting standardized processes and modular technologies available and most economic to them.

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Fuel Cell Performance by the Impedance Method (연료전지의 임피던스방법 적용 연구)

  • Kim, Gwi-Yeol
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.510-511
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    • 2008
  • Fuel cell is a modular, high efficient and environmentally energy conversion device, it has become a promising option to replace the conventional fossil fuel based electric power plants. The high temperature fuel cell has conspicuous feature and high potential in being used as an energy converter of various fuel to electricity and heat. And, The research and development for the solid oxide fuel cell have been promoted rapidly and extensively in recent years, because of their high efficiency and future potential. Therefore this paper describes the manufacturing method and characteristics of anode electrode for solid oxide fuel cell, by the way, Ni-YSZ materials are used as anode of high temperature widely. So in this experiments, we investigated the optimum content of Ni, by the impedance characteristics, overvoltage. As a result, the performance of Ni-YSZ anode(40vol%) was better excellent than the others.

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Simulation analysis of Transporting Fixation Equipment on Unit Module (유닛모듈 운반을 위한 고정장치의 시뮬레이션 분석)

  • Park, Su-Yeul;Kim, Kyoon-Tai;Park, Nam-Cheon;Chae, Myung-Jin
    • Proceedings of the Korean Institute of Building Construction Conference
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    • 2013.11a
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    • pp.143-144
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    • 2013
  • Unit module system produce units in the factory and assemble in the field. This unit module system has advantages of shortening the process of construction. However, it is still in the early research related to setting the unit module which is transported by truck to the field. Therefore, when transporting the unit module, this goal of study develops fixed devices. And suggesting device were performed that simulations analyzed maximum stress and assessed the safety.

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High Efficiency of Grid-Connected Modular Photovoltaic Power Conversion Device (계통연계형 모듈형 태양광 전력변환 장치 고 효율화)

  • Lee, Seung-min;Lee, Woo cheol
    • Proceedings of the KIPE Conference
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    • 2012.07a
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    • pp.269-270
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    • 2012
  • 이 논문에서는 Fly-Back-Converter로 Interleaving 동작하는 계통연계형 마이크로 인버터를 연구하고 200W급 태양전지 모듈에서 발생되는 전기에너지를 효율적으로 이용하여 계통에 연계하기 위한 전력변환시스템 개발을 목표로 하고 있다. 저렴하면서 효율이 높은 계통연계 인버터를 실현하기 위해서는 기존의 중앙집중식 인버터 구조와 다른 접근이 필요하다. 따라서 영전위 소프트 스위칭이 가능한 2병렬 인터리빙 구동의 Fly-Back DC/DC 컨버터 토폴로지로 입력 단 회로를 구성하여 모든 전력변환 동작이 일어나도록 한다. 출력전류를 사인파 open loop로 제어를 하고 CRM(Critical Conduction Mode) 스위칭 동작으로 높은 효율로 작동을 실현시켰다. 이 논문에서는 인터리빙으로 동작하였을 시 200W급 출력으로 나올 수 있는 전류 최대치를 계산 하였고 출력 전류가 사인파로 동작하게 제어방법을 기재하였다.

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A Study on the Characteristics of Modern Fashion Design for Digital Nomadic Culture (디지털 유목민 문화를 위한 현대 패션디자인의 특성 연구)

  • Kim, Jee-Hee
    • Fashion & Textile Research Journal
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    • v.9 no.1
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    • pp.6-14
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    • 2007
  • The purpose of this study was to delve into what type of expression mode of fashion design could suit the life style of digital nomads, as the appearance of nomadic life style was concurrent with people's modified way of thinking and sociocultural changes in today's digital society. It's basically meant to define the roles of fashion design, which was discussed as a way of improving the quality of life as a sort of 'culture,' and to suggest some of the right directions for fashion design in the future. The culture of today's digital era is marked by a pursuit of high mobility and high speed, and by nomadic disposition that is built on flexible thinking. The kind of design that lets people carry nomadic things with them and thereby improve their mobility can satisfy their needs for mobility, and body-friendly design that functions as a device of information in itself can meet their needs for mobility as well. The leading example of the latter is a wearable computer, and wearable scientific technology will be taken to another level, thanks to the advance in digital technology. In the future, that will be more accessible to people in general, and subminiature digital equipment will gain popularity in fashion industry as part of textiles and clothing or as an accessory. And specific kinds of design will be widespread, including variable design, multi-functional design and modular design. The first serves as a tool to protect the human body and to facilitate the adaptability of it to the given circumstances, and the second is characterized by a superb physical and psychological protectability. The third lets wearers bring design to completion at their own option, owing to an increase in the number of open-minded people and the development of interactive media. All these types of design could be called a wearer-friendly, human-oriented design that is specifically appropriate for the digital age. Wearers can actively be involved in design process as productive consumers, which is expected to help increase opener practices in fashion design sector.

Enhancing the Seismic Performance of Multi-storey Buildings with a Modular Tied Braced Frame System with Added Energy Dissipating Devices

  • Tremblay, R.;Chen, L.;Tirca, L.
    • International Journal of High-Rise Buildings
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    • v.3 no.1
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    • pp.21-33
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    • 2014
  • The tied braced frame (TBF) system was developed to achieve uniform seismic inelastic demand along the height of multi-storey eccentrically braced steel frames. A modular tied braced frame (M-TBF) configuration has been recently proposed to reach the same objective while reducing the large axial force demand imposed on the vertical tie members connecting the link beams together in TBFs. M-TBFs may however experience variations in storey drifts at levels where the ties have been removed to form the modules. In this paper, the possibility of reducing the discontinuity in displacement response of a 16-storey M-TBF structure by introducing energy dissipating (ED) devices between the modules is examined. Two M-TBF configurations are investigated: an M-TBF with two 8-storey modules and an M-TBF with four 4-storey modules. Three types of ED devices are studied: friction dampers (FD), buckling restrained bracing (BRB) members and self-centering energy dissipative (SCED) members. The ED devices were sized such that no additional force demand was imposed on the discontinuous tie members. Nonlinear response history analysis showed that all three ED systems can be used to reduce discontinuities in storey drifts of M-TBFs. The BRB members experienced the smallest peak deformations whereas minimum residual deformations were obtained with the SCED devices.

Real-time Intelligent Exit Path Indicator Using BLE Beacon Enabled Emergency Exit Sign Controller

  • Jung, Joonseok;Kwon, Jongman;Jung, Soonho;Lee, Minwoo;Mariappan, Vinayagam;Cha, Jaesang
    • International journal of advanced smart convergence
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    • v.6 no.1
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    • pp.82-88
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    • 2017
  • Emergency lights and exit signs are an indispensable part of safety precautions for effective evacuation in case of emergency in public buildings. These emergency sign indicates safe escape routes and emergency doors, using an internationally recognizable sign. However visibility of those signs drops drastically in case of emergency situations like fire smoke, etc. and loss of visibility causes serious problems for safety evacuation. This paper propose a novel emergency light and exit sign built-in with Bluetooth Low Energy (BLE) Beacon to assist the emergency self-guiding evacuation using devices for crisis and emergency management to avoid panic condition inside the buildings. In this approach, the emergency light and exit sign with the BLE beacons deployed in the indoor environments and the smart devices detect their indoor positions, direction to move, and next exit sign position from beacon messages and interact with map server in the Internet / Intranet over the available LTE and/or Wi-Fi network connectivity. The map server generate an optimal emergency exit path according to the nearest emergency exit based on a novel graph generation method for less route computation for each smart device. All emergency exit path data interfaces among three system components, the emergency exit signs, map server, and smart devices, have been defined for modular implementation of our emergency evacuation system. The proposed exit sign experimental system has been deployed and evaluated in real-time building environment thoroughly and gives a good evidence that the modular design of the proposed exit sign system and a novel approach to compute emergency exit path route based on the BLE beacon message, map server, and smart devices is competitive and viable.

An Efficient Hardware Implementation of Square Root Computation over GF(p) (GF(p) 상의 제곱근 연산의 효율적인 하드웨어 구현)

  • Choe, Jun-Yeong;Shin, Kyung-Wook
    • Journal of IKEEE
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    • v.23 no.4
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    • pp.1321-1327
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    • 2019
  • This paper describes an efficient hardware implementation of modular square root (MSQR) computation over GF(p), which is the operation needed to map plaintext messages to points on elliptic curves for elliptic curve (EC)-ElGamal public-key encryption. Our method supports five sizes of elliptic curves over GF(p) defined by the National Institute of Standards and Technology (NIST) standard. For the Koblitz curves and the pseudorandom curves with 192-bit, 256-bit, 384-bit and 521-bit, the Euler's Criterion based on the characteristic of the modulo values was applied. For the elliptic curves with 224-bit, the Tonelli-Shanks algorithm was simplified and applied to compute MSQR. The proposed method was implemented using the finite field arithmetic circuit with 32-bit datapath and memory block of elliptic curve cryptography (ECC) processor, and its hardware operation was verified by implementing it on the Virtex-5 field programmable gate array (FPGA) device. When the implemented circuit operates with a 50 MHz clock, the computation of MSQR takes about 18 ms for 224-bit pseudorandom curves and about 4 ms for 256-bit Koblitz curves.

Design of Iterative Divider in GF(2163) Based on Improved Binary Extended GCD Algorithm (개선된 이진 확장 GCD 알고리듬 기반 GF(2163)상에서 Iterative 나눗셈기 설계)

  • Kang, Min-Sup;Jeon, Byong-Chan
    • The KIPS Transactions:PartC
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    • v.17C no.2
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    • pp.145-152
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    • 2010
  • In this paper, we first propose a fast division algorithm in GF($2^{163}$) using standard basis representation, and then it is mapped into divider for GF($2^{163}$) with iterative hardware structure. The proposed algorithm is based on the binary ExtendedGCD algorithm, and the arithmetic operations for modular reduction are performed within only one "while-statement" unlike conventional approach which uses two "while-statement". In this paper, we use reduction polynomial $f(x)=x^{163}+x^7+x^6+x^3+1$ that is recommended in SEC2(Standards for Efficient Cryptography) using standard basis representation, where degree m = 163. We also have implemented the proposed iterative architecture in FPGA using Verilog HDL, and it operates at a clock frequency of 85 MHz on Xilinx-VirtexII XC2V8000 FPGA device. From implementation results, we will show that computation speed of the proposed scheme is significantly improved than the existing two approaches.

A High-Performance ECC Processor Supporting NIST P-521 Elliptic Curve (NIST P-521 타원곡선을 지원하는 고성능 ECC 프로세서)

  • Yang, Hyeon-Jun;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.26 no.4
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    • pp.548-555
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    • 2022
  • This paper describes the hardware implementation of elliptic curve cryptography (ECC) used as a core operation in elliptic curve digital signature algorithm (ECDSA). The ECC processor supports eight operation modes (four point operations, four modular operations) on the NIST P-521 curve. In order to minimize computation complexity required for point scalar multiplication (PSM), the radix-4 Booth encoding scheme and modified Jacobian coordinate system were adopted, which was based on the complexity analysis for five PSM algorithms and four different coordinate systems. Modular multiplication was implemented using a modified 3-Way Toom-Cook multiplication and a modified fast reduction algorithm. The ECC processor was implemented on xczu7ev FPGA device to verify hardware operation. Hardware resources of 101,921 LUTs, 18,357 flip-flops and 101 DSP blocks were used, and it was evaluated that about 370 PSM operations per second were achieved at a maximum operation clock frequency of 45 MHz.