• Title/Summary/Keyword: mobile memory

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An Efficient Method in Mobile E-health system for Large Images Processing (모바일 폰 기반의 사이버 자연사 박물관)

  • Hong, Sung-Soo;Khan, Irfan
    • Proceedings of the Korea Information Processing Society Conference
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    • 2011.04a
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    • pp.378-381
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    • 2011
  • These days rapid improvement in Mobile phones and their multimedia limits made them powerful enough to manage complicated tasks. Image processing related support for mobile devices is extremely comprehensive in wireless telemedicine. A basic challenge is how to get best quality of image with the limited screen size and resources of mobile phones. This paper deals with image processing features (capturing rendering and zooming in and out) of Mobile Media API and Advanced Multimedia Supplements (MMAPI and AMS) developed for Mobile Java Platform and customized algorithm is designed to keep all image task cost efficient by using minimum device resources and memory. This scenario is driven by the need for evaluation of a distant patient that cannot be moved to the expert.

Design and Implementation of B-Tree on Flash Memory (플래시 메모리 상에서 B-트리 설계 및 구현)

  • Nam, Jung-Hyun;Park, Dong-Joo
    • Journal of KIISE:Databases
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    • v.34 no.2
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    • pp.109-118
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    • 2007
  • Recently, flash memory is used to store data in mobile computing devices such as PDAs, SmartCards, mobile phones and MP3 players. These devices need index structures like the B-tree to efficiently support some operations like insertion, deletion and search. The BFTL(B-tree Flash Translation Layer) technique was first introduced which is for implementing the B-tree on flash memory. Flash memory has characteristics that a write operation is more costly than a read operation and an overwrite operation is impossible. Therefore, the BFTL method focuses on minimizing the number of write operations resulting from building the B-tree. However, we indicate in this paper that there are many rooms of improving the performance of the I/O cost in building the B-tree using this method and it is not practical since it increases highly the usage of the SRAM memory storage. In this paper, we propose a BOF(the B-tree On Flash memory) approach for implementing the B-tree on flash memory efficiently. The core of this approach is to store index units belonging to the same B-tree node to the same sector on flash memory in case of the replacement of the buffer used to build the B-tree. In this paper, we show that our BOF technique outperforms the BFTL or other techniques.

Effective Backup and Real-Time Replication Techniques for HSS System in All-IP Mobile Networks (All-IP 이동 통신망에서 HSS 시스템의 효과적인 백업과 실시간 이중화 기법)

  • Park, Seong-Jin;Park, Hyung-Soo
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.4
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    • pp.795-804
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    • 2009
  • An HSS(Home Subscriber Server) system requires a main-memory database on main-memory unit for the real-tine management of the subscriber information in the mobile communication service, in that the system controls not only basic data for handling calls of users, but also additional service data related to user authentication and operational data. Nonetheless, HSS-DBS system, requiring the reliability and stability, need more secure data store method and a back-up technique because the system have a long startup time and the big problem on the failures of main-memory. This paper proposes an efficient back-up replication technique, on the basis of enhancing the stability and performance of HSS system. The proposed shadowing back-up technique adopting the delayed recovery process, can help minimize the real-time back-up overloads by location registration, while the proposed backup replication method enables more stable system operations with replicating the data to remote server in real time.

Secure Deletion for Flash Memory File System (플래시메모리 파일시스템을 위한 안전한 파일 삭제 기법)

  • Sun, Kyoung-Moon;Choi, Jong-Moo;Lee, Dong-Hee;Noh, Sam-H.
    • Journal of KIISE:Computing Practices and Letters
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    • v.13 no.6
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    • pp.422-426
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    • 2007
  • Personal mobile devices equipped with non-volatile storage such as MP3 player, PMP, cellular phone, and USB memory require safety for the stored data on the devices. One of the safety requirements is secure deletion, which is removing stored data completely so that the data can not be restored illegally. In this paper, we study how to design the secure deletion on Flash memory, commonly used as storage media for mobile devices. We consider two possible secure deletion policy, named zero-overwrite and garbage-collection respectively, and analyze how each policy affects the performance of Flash memory file systems. Then, we propose an adaptive file deletion scheme that exploits the merits of the two possible policies. Specifically, the proposed scheme applies the zero-overwrite policy for small files, whereas it employs the garbage-collection policy for large files. Real implementation experiments show that the scheme is not only secure but also efficient.

An Efficient Buffer Cache Management Scheme for Heterogeneous Storage Environments (이기종 저장 장치 환경을 위한 버퍼 캐시 관리 기법)

  • Lee, Se-Hwan;Koh, Kern;Bahn, Hyo-Kyung
    • Journal of KIISE:Computer Systems and Theory
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    • v.37 no.5
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    • pp.285-291
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    • 2010
  • Flash memory has many good features such as small size, shock-resistance, and low power consumption, but the cost of flash memory is still high to substitute for hard disk entirely. Recently, some mobile devices, such as laptops, attempt to use both flash memory and hard disk together for taking advantages of merits of them. However, existing OSs (Operating Systems) are not optimized to use the heterogeneous storage media. This paper presents a new buffer cache management scheme. First, we allocate buffer cache space according to access patterns of block references and the characteristics of storage media. Second, we prefetch data blocks selectively according to the location of them and access patterns of them. Third, we moves destaged data from buffer cache to hard disk or flash memory considering the access patterns of block references. Trace-driven simulation shows that the proposed schemes enhance the buffer cache hit ratio by up to 29.9% and reduce the total I/O elapsed time by up to 49.5%.

Flash-Aware Transaction Management Scheme for flash Memory Database (플래시 메모리 데이터베이스를 위한 플래시인지 트랜잭션 관리 기법)

  • Byun Si Woo
    • Journal of Internet Computing and Services
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    • v.6 no.1
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    • pp.65-72
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    • 2005
  • Flash memories are one of best media to support portable computers in mobile computing environment. The features of non-volatility, low power consumption. and fast access time for read operations are sufficient grounds to support flash memory as major database storage components of portable computers. However. we need to Improve traditional transaction management scheme due to the relatively slow characteristics of flash operation as compared to RAM memory. In order to achieve this goal. we devise a new scheme called flash-aware transaction management (FATM). FATM improves transaction performance by exploiting SRAM and W-Cache, We also propose a simulation model to show the performance of FATM. Based on the results of the performance evaluation, we conclude that FATM scheme outperforms the traditional scheme.

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Technology Trend of Next Generation Information Storage Systems (차세대 정보저장시스템 최신 기술 동향)

  • Park Young-Pil;Rhim Yun-Chul;Yang Hyun-Seok;Kang Shinill;Park No-Cheol;Kim Young-Joo
    • Transactions of the Society of Information Storage Systems
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    • v.1 no.1
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    • pp.1-22
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    • 2005
  • There are two important trends in the modern information society, including digital networking and ubiquitous environment. Thus it is strongly required to develop new information storage devices such as high density storages to match the increased data capacity and small size storage devices to be applied to the mobile multimedia electronics. So far, many approaches have been studied for the high density memory, including the holographic memory, super-RENS and near-field recording using solid immersion lens (SIL) or nano-probe for the ODD (Optical Disk Drive) system, and the perpendicular magnetic recording and heat-assisted magnetic recording for the HDD (Hard Disk Drive) system. In addition, new mobile storage devices have been prepared using 0.85" HDD and 30mm ODD systems from a lot of foreign and domestic companies and institutes. In this paper, the recent technology trend for the next generation information storage system is summarized to offer a research motivation and encouragement to new researchers in this field with an emphasis on the technical issues of the increase of data capacity and decrease of device size.

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Two-Tier Storage DBMS for High-Performance Query Processing

  • Eo, Sang-Hun;Li, Yan;Kim, Ho-Seok;Bae, Hae-Young
    • Journal of Information Processing Systems
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    • v.4 no.1
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    • pp.9-16
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    • 2008
  • This paper describes the design and implementation of a two-tier DBMS for handling massive data and providing faster response time. In the present day, the main requirements of DBMS are figured out using two aspects. The first is handling large amounts of data. And the second is providing fast response time. But in fact, Traditional DBMS cannot fulfill both the requirements. The disk-oriented DBMS can handle massive data but the response time is relatively slower than the memory-resident DBMS. On the other hand, the memory-resident DBMS can provide fast response time but they have original restrictions of database size. In this paper, to meet the requirements of handling large volumes of data and providing fast response time, a two-tier DBMS is proposed. The cold-data which does not require fast response times are managed by disk storage manager, and the hot-data which require fast response time among the large volumes of data are handled by memory storage manager as snapshots. As a result, the proposed system performs significantly better than disk-oriented DBMS with an added advantage to manage massive data at the same time.

Design and Implementation of an Efficient FTL for Large Block Flash Memory using Improved Hybrid Mapping (향상된 혼합 사상기법을 이용한 효율적인 대블록 플래시 메모리 변환계층 설계 및 구현)

  • Park, Dong-Joo;Kwak, Kyoung-Hoon
    • Journal of KIISE:Computing Practices and Letters
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    • v.15 no.1
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    • pp.1-13
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    • 2009
  • Flash memory is widely used as a storage medium of mobile devices such as MP3 players, cellular phones and digital cameras due to its tiny size, low power consumption and shock resistant characteristics. Currently, there are many studies to replace HDD with flash memory because of its numerous strong points. To use flash memory as a storage medium, FTL(Flash Translation Layer) is required since flash memory has erase-before-write constraints and sizes of read/write unit and erase unit are different from each other. Recently, new type of flash memory called "large block flash memory" is introduced. The large block flash memory has different physical structure and characteristics from previous flash memory. So existing FTLs are not efficiently operated on large block flash memory. In this paper, we propose an efficient FTL for large block flash memory based on FAST(Fully Associative Sector Translation) scheme and page-level mapping on data blocks.

FeRAM Technology for System on a Chip

  • Kang, Hee-Bok;Jeong, Dong-Yun;Lom, Jae-Hyoung;Oh, Sang-Hyun;Lee, Seaung-Suk;Hong, Suk-Kyoung;Kim, Sung-Sik;Park, Young-Jin;Chung, Jin-Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.2 no.2
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    • pp.111-124
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    • 2002
  • The ferroelectric RAM (FeRAM) has a great advantage for a system on a chip (SOC) and mobile product memory, since FeRAM not only supports non-volatility but also delivers a fast memory access similar to that of DRAM and SRAM. This work develops at three levels: 1) low voltage operation with boost voltage control of bitline and plateline, 2) reducing bitline capacitance with multiple divided sub cell array, and 3) increasing chip performance with write operation sharing both active and precharge time period. The key techniques are implemented on the proposed hierarchy bitline scheme with proposed hybrid-bitline and high voltage boost control. The test chip and simulation results show the performance of sub-1.5 voltage operation with single step pumping voltage and self-boost control in a cell array block of 1024 ($64{\;}{\times}{\;}16$) rows and 64 columns.