• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2004.07a
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• pp.328-328
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• 2004

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.11
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• pp.48-53
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• 2007

In this paper, a high LO-RF isolation W-band MIMIC single-balanced mixer was designed and fabricated using a branch line coupler and a ${\lambda}/4$ transmission line. The W-band MIMIC single-balanced mixer was designed using the $0.1\;{\mu}m$ InGaAs/InAlAs/GaAs Metamorphic HEMT diode. The fabricated MHEMT was obtained the cut-off frequency($f_T$) of 154 GHz and the maximum oscillation frequency($f_{max}$) of 454 GHz. The designed MIMIC single-balanced mixer was fabricated using $0.1\;{\mu}m$ MHEMT MIMIC process. From the measurement, the conversion loss of the single-balanced mixer was 12.8 dB at an LO power of 8.6 dBm. P1 dB(1 dB compression point) of input and output were 5 dBm and -8.9 dBm, respectively. The LO-RF isolations of single-balanced mixer was obtained 37.2 dB at 94 GHz. We obtained in this study a higher LO-RF isolation compared to some other balanced mixers in millimeter-wave frequencies.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.4
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• pp.397-403
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• 2008

In this paper, the mixer was implemented in the non-radiative dielectric waveguide that is the main component of 60 GHz band radio telecommunications equipment which a demand increases for the purpose of point-to-point communication network. As to the manufacture of the non-radiative dielectric waveguide mixer, it was the implementation of the dielectric line combiner to be most difficult. The thing which that gives shape to the curvature which is the dielectric line determined and the to place in the exact interval thing are easy. For this reason, it was very difficult to make in order to have the regular performance in the case of the mixer having the dielectric line combiner. In this paper, since the dielectric line combiner was replaced with the waveguide directional coupler and the manufacture was possible through a processing it had the characteristic that a combiner is fixed. In result, the productivity of a mixer was innovatively improved. The design frequency of the mixer implemented through this paper RF and LO are $51{\sim}64\;GHz$. IF Is $DC{\sim}\;GHz2$. The down conversion loss toward the RF input of $60{\sim}62\;GHz$ was measured by $10{\pm}1\;dB$ in the condition that LO is 10 dBm, 60 GHz.

• Journal of IKEEE
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• v.7 no.2 s.13
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• pp.236-244
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• 2003

In this paper, RF and IF circuits for mobile terminals which have usually been implemented using expensive BiCMOS processes are designed using CMOS circuits, and a Tx CMOS RF/IF single chip for PCS applications is designed. The designed circuit consists of an IF block including an IF PLL frequency synthesizer, an IF mixer, and a VGA and an RF block including a SSB RF mixer and a driver amplifier, and performs all transmit signal processing functions required between digital baseband and the power amplifier. The phase noise level of the designed IF PLL frequency synthesizer is -114dBc/Hz@100kHz and the lock time is less than $300{\mu}s$. It consumes 5.3mA from a 3V power supply. The conversion gain and OIP3 of the IF mixer block are 3.6dB and -11.3dBm. It consumes 5.3mA. The 3dB frequencies of the VGA are greater than 250MHz for all gain settings. The designed VGA consumes 10mA. The designed RF block exhibits a gain of 14.93dB and an OIP3 of 6.97dBm. The image and carrier suppressions are 35dBc and 31dBc, respectively. It consumes 63.4mA. The designed circuits are under fabrication using a $0.35{\mu}m$ CMOS process. The designed entire chip consumes 84mA from a 3V supply, and its area is $1.6㎜{\times}3.5㎜$.

• Journal of Advanced Navigation Technology
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• v.18 no.4
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• pp.341-346
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• 2014

This paper has presented the design and fabrication of phase correlator for wideband digital frequency discriminator (DFD) operating over the 6.0 to 18.0 GHz frequency range. Fabricated DFD phase correlator has been measured I or Q output signal, and analyzed frequency discrimination error. The operation of the proposed mixer type correlator has been analyzed by deriving some analytic equations. To design the phase correlator, this paper has modeled and simulated IQ mixer and 8-way power divider by using RF simulation tool. Designed phase correlator has fabricated and measured. The phase error and frequency discrimination error have been presented using by measured I and Q output signal. Over the 6.0~18.0 GHz range, the root mean square(RMS) phase error is $4.81^{\circ}$, RMS and frequency discrimination error is 1.49 MHz, RMS.

• Journal of the Korea Society of Computer and Information
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• v.22 no.1
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• pp.63-69
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• 2017

In this paper, we propose a method to optimize the geometry and installation position of the mixer in the selective catalytic reduction (SCR) system by computational fluid dynamic(CFD). Using the commercial CFD software of CFD-ACE+, the flow dynamics of the flue gas was numerically analyzed for improving the injection uniformity of the reduction agent. Numerical analysis of the mixed gas heat flow into the upstream side of the primary SCR catalyst layer was performed when the denitrification facility was operated. The characteristics such as the flow rate, temperature, pressure loss and ammonia concentration of the mixed gas consisting of the flue gas and the ammonia reducing gas were examined at the upstream of the catalyst layer of SCR. The temperature difference on the surface of the catalyst layer is very small compared to the flow rate of the exhaust gas, and the temperature difference caused by the reducing gas hardly occurs because the flow rate of the reducing gas is very small. When the mixed gas is introduced into the SCR reactor, there is a slight tendency toward one wall. When the gas passes through the catalyst layer having a large pressure loss, the flow angle of the exhaust gas changes because the direction of the exhaust gas changes toward a smaller flow. Based on the uniformity of the flow rate of the mixed gas calculated at the SCR, it is judged that the position of the test port reflected in the design is proper.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.1
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• pp.29-36
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• 2009

In this paper, the design and implementation of LNA and down-mixer using 90 nm CMOS process are presented for 60 GHz band WPAN receiver. In order to extract characteristics of the transistor used to design each elements under the optimum bias conditions, the S-parameter of the manufactured cascode topology was measured and the effect of the RF pad was removed. Measured results of 3-stages cascode type LNA the gain of 25 dB and noise figure of 7 dB. Balanced type down-mixer with a balun at LO input port shows the conversion gain of 12.5 dB within IF frequency($8.5{\sim}11.5\;GHz$) and input PldB of -7 dBm. The size and power consumption of LNA and down-mixer are $0.8{\times}0.6\;mm^2$, 43 mW and $0.85{\times}0.85\;mm^2$, 1.2 mW, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.10 no.1
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• pp.90-98
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• 1999

This paper presents a wideband single-balanced mixer using a diode which can be used in RF receiver of microwave measurement systems. For wideband characteristic, local oscillator(LO) signal is provided to diode with low loss using a coplanar waveguide-to-slotline balun. For high isolation characteristic radio frequency (RF) port and intermediate frequency (IF) port are designed using directional coupler. This mixer presents 30.5~31.17dB conversion loss whose flatness is within 1dB for 9 kHz~2.6 GHz wideband RF signal, and above 30 dB isolation for LO signal.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.11
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• pp.1280-1287
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• 2012

The 3.2~6.5 GHz wideband YTO(YIG Tuned Oscillator) module is designed, fabricated and measured. To improve the phase noise characteristic of the YTO module, offset PLL(Phase Locked Loop) structure with sampling mixer is applied. This YTO module is composed of sampling mixer, phase detector, loop filter, current driver, and YTO. The phase noise of the fabricated YTO module is measured as -100 dBc/Hz at 10 kHz offset frequency, which approximates the predicted result at the center frequency of 4.5 GHz. This YTO module presents over 10 dB improved phase noise compared to conventional PLL module from operating frequency.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.8
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• pp.1392-1398
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• 2000

In this paper, Sub Harmonic Ring Mixer using Anti-Parallel Diode Pair is studied. Conventional mixers mix LO signal with RF signal and, obtain IF signal from the difference between LO and RF. Sub harmonic ring mixers using APDP mix RF signal with the second harmonic of LO signal, LO frequency needed for conventional receiver is reduced by 1/2.The produced mixer showed 12 dB conversion loss, and 1 dB compression point of IF signal, in respect to RF signal, was found at the 0 dBm RF signal. Isolation LO/IF and LO/RF is 24.6 dB and 22.5 dB respectively. Isolation RF/LO and LO/RF is 32.6 dB and 22.5 dB respectively.