• Title/Summary/Keyword: mixed power

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Dry etching of ZnO thin film using a $CF_4$ mixed by Ar

  • Kim, Do-Young;Kim, Hyung-Jun
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.1504-1507
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    • 2009
  • In this paper, the etching behavior of ZnO in $CF_4$ plasma mixed Ar was investigated. Previously, the etch rate in $CF_4$/Ar plasma was reported that it is slower than that in Cl containing plasma. But, plasma included Cl atom can produce the by-product such as $ZnCl_2$. In order to solve this film contamination, no Cl containing etching gas is required. We controlled the etching parameter such as source power, substrate bias power, and $CF_4$/Ar gas ratio to acquire the fast etch rate using a ICP etcher. We accomplished the etching rate of 144.85 nm/min with the substrate bias power of 200W. As the energetic fluorine atoms were bonded with Zinc atoms, the fluoride zinc crystal ($ZnF_2$) was observed by X-ray photoelectron spectroscopy (XPS).

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Low Power ADC Design for Mixed Signal Convolutional Neural Network Accelerator (혼성신호 컨볼루션 뉴럴 네트워크 가속기를 위한 저전력 ADC설계)

  • Lee, Jung Yeon;Asghar, Malik Summair;Arslan, Saad;Kim, HyungWon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.11
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    • pp.1627-1634
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    • 2021
  • This paper introduces a low-power compact ADC circuit for analog Convolutional filter for low-power neural network accelerator SOC. While convolutional neural network accelerators can speed up the learning and inference process, they have drawback of consuming excessive power and occupying large chip area due to large number of multiply-and-accumulate operators when implemented in complex digital circuits. To overcome these drawbacks, we implemented an analog convolutional filter that consists of an analog multiply-and-accumulate arithmetic circuit along with an ADC. This paper is focused on the design optimization of a low-power 8bit SAR ADC for the analog convolutional filter accelerator We demonstrate how to minimize the capacitor-array DAC, an important component of SAR ADC, which is three times smaller than the conventional circuit. The proposed ADC has been fabricated in CMOS 65nm process. It achieves an overall size of 1355.7㎛2, power consumption of 2.6㎼ at a frequency of 100MHz, SNDR of 44.19 dB, and ENOB of 7.04bit.

Interference-Aware Radio Resource Allocation in D2D Underlaying LTE-Advanced Networks

  • Xu, Shaoyi;Kwak, Kyung Sup;Rao, Ramesh R.
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.8 no.8
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    • pp.2626-2646
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    • 2014
  • This study presents a power and Physical Resource Blocks (PRBs) joint allocation algorithm to coordinate uplink (UL) interference in the device-to-device (D2D) underlaying Long Term Evolution-Advanced (LTE-A) networks. The objective is to find a mechanism to mitigate the UL interference between the two subsystems and maximize the weighted sum throughput as well. This optimization problem is formulated as a mixed integer nonlinear programming (MINLP) which is further decomposed into PRBs assignment and transmission power allocation. Specifically, the scenario of applying imperfect channel state information (CSI) is also taken into account in our study. Analysis reveals that the proposed PRBs allocation strategy is energy efficient and it suppresses the interference not only suffered by the LTE-A system but also to the D2D users. In another side, a low-complexity technique is proposed to obtain the optimal power allocation which resides in one of at most three feasible power vectors. Simulations show that the optimal power allocation combined with the proposed PRBs assignment achieves a higher weighted sum throughput as compared to traditional algorithms even when imperfect CSI is utilized.

Influence of Sputter Power on the Structural and Optical Properties of CdS Films for Photovoltaic Applications (태양전지용 CdS 박막의 구조적, 광학적 물성에 미치는 스퍼터 전력 효과)

  • Lee, Jae-Hyeong;Lim, Dong-Gun;Yang, Kea-Joon
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.4
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    • pp.322-327
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    • 2006
  • CdS films have been prepared on polycarbonate, polyethylene terephthalate, and Coming 7059 substrates by r.f magnetron sputtering technique at room temperature. A comparison of the properties of the films deposited on polymer and glass substrates was performed. In addition, the influence of the sputter power on the structural and optical properties of these films was evaluated. The XRD measurements revealed that CdS films were polycrystalline and retained the mixed structure of hexagonal wurtzite and cubic phase, regardless of substrate types. As the sputter power was increased from 75 to 150 Watt, the structure of CdS films was converted from the mixed of hexagonal and cubic phase to hexagonal phase. The morphology of CdS films is found to be continuous and dense. Also, the grain of CdS films is larger with increasing the sputter power. The average transmittance exceeded 80 % in the visible spectrum for all films and decreases slightly with the sputter power.

On-Chip Full CMOS Current and Voltage References for High-Speed Mixed-Mode Circuits (고속 혼성모드 집적회로를 위한 온-칩 CMOS 전류 및 전압 레퍼런스 회로)

  • Cho, Young-Jae;Bae, Hyun-Hee;Jee, Yong;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.40 no.3
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    • pp.135-144
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    • 2003
  • This work proposes on-chip full CMOS current and voltage references for high-speed mixed-mode circuits. The proposed current reference circuit uses a digital-domain calibration method instead of a conventional analog calibration to obtain accurate current values. The proposed voltage reference employs internal reference voltage drivers to minimize the high-frequency noise from the output stages of high-speed mixed-mode circuits. The reference voltage drivers adopt low power op amps and small- sized on-chip capacitors for low power consumption and small chip area. The proposed references are designed, laid out, and fabricated in a 0.18 um n-well CMOS process and the active chip area is 250 um x 200 um. The measured results show the reference circuits have the power supply variation of 2.59 %/V and the temperature coefficient of 48 ppm/$^{\circ}C$ E.

A Genetic Algorithm for the Chinese Postman Problem on the Mixed Networks (유전자 알고리즘을 이용한 혼합 네트워크에서의 Chinese Postman Problem 해법)

  • Jun Byung Hyun;Kang Myung Ju;Han Chi Geun
    • Journal of the Korea Society of Computer and Information
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    • v.10 no.1 s.33
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    • pp.181-188
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    • 2005
  • Chinese Postman Problem (CPP) is a problem that finds a shortest tour traversing all edges or arcs at least once in a given network. The Chinese Postman Problem on Mixed networks (MCPP) is a Practical generalization of the classical CPP and it has many real-world applications. The MCPP has been shown to be NP-complete. In this paper, we transform a mixed network into a symmetric network using virtual arcs that are shortest paths by Floyd's algorithm. With the transformed network, we propose a Genetic Algorithm (GA) that converges to a near optimal solution quickly by a multi-directional search technique. We study the chromosome structure used in the GA and it consists of a path string and an encoding string. An encoding method, a decoding method, and some genetic operators that are needed when the MCPP is solved using the Proposed GA are studied. . In addition, two scaling methods are used in proposed GA. We compare the performance of the GA with an existing Modified MDXED2 algorithm (Pearn et al. , 1995) In the simulation results, the proposed method is better than the existing methods in case the network has many edges, the Power Law scaling method is better than the Logarithmic scaling method.

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Experimental Investigation on the Cryogenic Thermosiphon Using N$_2$ and CF$_4$ Mixture as the Working Fluid (N$_2$와 CF$_4$ 혼합물을 작동유체로 하는 극저온 열사이펀에 대한 실험적 연구)

  • Kim, Young-Kwon;Lee, Ji-Sung;Jeong, Sang-Kwon;Han, Young-Hee;Jung, Se-Yong;Park, Byung-Jun
    • Korean Journal of Air-Conditioning and Refrigeration Engineering
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    • v.21 no.9
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    • pp.505-512
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    • 2009
  • A thermosiphon is utilized as a thermal shunt to reduce the cool-down time of a cryogenic system cooled by a two stage cryocooler. The cool-down time reduction by the thermosiphon is determined by the type of working fluid which is directly related to the operating temperature range of the thermosiphon. A mixed working fluid has a potential to widen the operation temperature range of the thermosipohon. In this study, the thermosiphon using N$_2$ and CF$_4$ mixture as the working fluid is fabricated and tested to verify its transient heat transfer performance. The thermosiphon with the mixed working fluid has no noticeable reduction of cool-down time compared with that of the thermosiphon with pure working fluid in this experiment. However, it seems that the thermosiphon with mixed working fluid may have an advantage according to the cooling capacity of a cryocooler, the cooling target temperature and the size of a cooling object.

Algorithm of Analysing Electric Power Signal for Home Electric Power Monitoring in Non-Intrusive Way (가정용 전력 모니터링을 위한 전력신호 분석 알고리즘 개발)

  • Park, Sung-Wook;Wang, Bo-Hyeun
    • Journal of the Korean Institute of Intelligent Systems
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    • v.21 no.6
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    • pp.679-685
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    • 2011
  • This paper presents an algorithm identifying devices that generate observed mixed signals that are collected at main power-supply line. The proposed algorithm, which is necessary for low cost electric power monitoring system at appliance-level, that is non-intrusive load monitoring system, divides incoming mixed signal into multiple time intervals, calculating difference-signals between consecutive time interval, and identifies which device is operating at the time interval by analysing the difference-signals. Since the features of one device can remain when the time interval is short enough and the features are independent and additive, well-known classification algorithms can be used to classify the difference-signals with features of N individual devices, otherwise $2^N$ features might be necessary. The proposed algorithm was verified using data mixed in a laboratory with individual devices's data collected from field. When maximum 4 devices operate or stop sequentially and when features satisfy the requirements of proposed algorithm, the proposed algorithm resulted nearly 100% success rate under the constrained test condition. In order to apply the proposed algorithm in real world, the number devices shall increase, the time interval shall be smaller and the pattern of mixture shall be more diverse. However we can expect, if features used follow guidelines of proposed algorithm, future system could have certain level of performance without the guideline.