• Korean Linguistics
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• v.79
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• pp.91-116
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• 2018

This paper aims at proposing issues of breath and memory in speech based on the quantitative analysis of breath groups and pause units in Korean. As a human being, we have two kinds of limitations on continuing speech; breath and memory. The prosodic structure and temporal structure of spontaneous speech data from six speakers were closely examined. One of the main findings of the present study is that the prosodic structure and temporal structure of Korean appears to reflect the breath and memory problems in speech.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.2
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• pp.75-84
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• 2005

This research is to design a high performance NAND-type flash memory package with a smart buffer cache that enhances the exploitation of spatial and temporal locality. The proposed buffer structure in a NAND flash memory package, called as a smart buffer cache, consists of three parts, i.e., a fully-associative victim buffer with a small block size, a fully-associative spatial buffer with a large block size, and a dynamic fetching unit. This new NAND-type flash memory package can achieve dramatically high performance and low power consumption comparing with any conventional NAND-type flash memory. Our results show that the NAND flash memory package with a smart buffer cache can reduce the miss ratio by around 70% and the average memory access time by around 67%, over the conventional NAND flash memory configuration. Also, the average miss ratio and average memory access time of the package module with smart buffer for a given buffer space (e.g., 3KB) can achieve better performance than package modules with a conventional direct-mapped buffer with eight times(e.g., 32KB) as much space and a fully-associative configuration with twice as much space(e.g., 8KB)

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.12
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• pp.9-19
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• 1997

This paper describes the design and FPGA implementation of a system control unit within a multiprocessor chip which can be used as a node processor ina massively parallel processing (MPP) caches, memory management units, a bus unit and a system control unit. Major functions of the system control unit are locking/unlocking of the shared variables of protected access, synchronization of instruction execution among four integer untis, control of interrupts, generation control of processor's status, etc. The system control unit was modeled in very high level using verilog HDL. Then, it was simulated and verified in an environment where trap handler and external interrupt controller were added. Functional blocks of the system control unit were changed into RTL(register transfer level) model and synthesized using xilinx FPGA cell library in synopsys tool. The synthesized system control unit was implemented by Xilinx FPGA chip (XC4025EPG299) after timing verification.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.19 no.4
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• pp.119-128
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• 2019

Due to the nature of the 3D graphics processor system, many mathematical calculations are required and parallel processing research using GPU (Graphics Processing Unit) is being performed for high-speed processing. In this paper, we propose a 3D graphics processor using MAMS, a parallel processor that does not use cache memory, to solve the GPU problem of increasing bandwidth caused by cache memory miss and the problem that 3D shader processing speed is not constant. The 3D graphics processor using MAMS proposed in this paper designed Vertex shader, Pixel shader, Tiling and Rasterizing structure using DirectX command analysis, the FPGA(Xilinx Virtex6@100MHz) board for MAMS was constructed and designed using Verilog. We compared the processing time of the developed FPGA (100Mhz) and nVidia GeForce GTX 660 (980Mhz), the processing time using GTX 660 was not constant and suing MAMS was constant.

• IEMEK Journal of Embedded Systems and Applications
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• v.13 no.5
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• pp.269-277
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• 2018

NAND flash memory has widely been used because of non-volatility, low power consumption and fast access time. However, it suffers from inability to provide update-in-place and the erase cycle is limited. The unit of read/write operation is a page and the unit of erase operation is a block. Moreover erase operation is slower than other operations. We proposed the Adaptive Garbage Collection (called "AGC") policy which focuses on not only reducing garbage collection process time for real-time guarantee but also wear-leveling for a flash memory lifetime. The AGC performs better than Cost-benefit policy and Greedy policy. But the AGC does not consider the operation characteristics. So we proposed the Advanced Adaptive Garbage Collection (called "A-AGC") policy which considers the page write operation count and block erase operation count. The A-AGC reduces the write operations by considering the data update frequency and update data size. Also, it reduces the erase operations by considering the file fragmentation. We implemented the A-AGC policy and measured the performance compared with the AGC policy. Simulation results show that the A-AGC policy performs better than AGC, specially for append operation.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.37 no.12
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• pp.1258-1263
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• 2009

This paper describes the design and test results of engineering qualification model(EQM) of mass memory unit(MMU) for STSAT-3. The MMU for STSAT-3 having 32Gb mass memory capacity is capable of receiving and transmitting the mission data from MIRIS(Multi-purpose IR Imaging System) and COMIS(Compact Imaging Spectrometer) at 100Mbps and 10Mbps. The performance of EQM MMU was verified by the tests of data receiving from two payloads and data transmission to the data receiving system. Moreover, the vibration and thermal vacuum test was performed to verify the launch vehicle and space environments.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.05a
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• pp.540-543
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• 2010

POWER PC series are common to the Central Processing Unit for Military Single Board Computer. Among them, G4 group, which contains the 74xx series supported by Freescale manufacturer is mainly used in the Military applications. We focus on the Interface between memory and controller. PCB stacking method, component routing, impedance matching and harsh environment for Military spec are the main constraints for implementation. Also, we developed memory as a module for the consideration of Military environments. The overall type of SBC should be designed by the form of 6U VME or 3U VME.

• Journal of the Korea Institute of Military Science and Technology
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• v.22 no.4
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• pp.536-544
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• 2019

During the assembly and function inspection of missile system, flight simulation process is required. In the conventional flight simulation check of missiles, an inertial navigation system simulator was used to transmit the navigation output data acquired in HILS. There are several disadvantages in terms of check configuration complexity and data synchronization when using the simulator. So we proposed a new flight simulation method that utilizes the nonvolatile built-in memory of the aviation control unit. The data processing procedure and operation procedure of the proposed method for type I and type II missiles are presented. And we analyzed the causes of the difference between proposed method result and the HILS result for type II missile. By comparing the results obtained by the experiments using the proposed method with the results of HILS, the validity of proposed method was confirmed.

• Journal of the Korean Society of Systems Engineering
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• v.19 no.2
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• pp.18-31
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• 2023

Exploring artificial intelligence and machine learning for nuclear safety has witnessed increased interest in recent years. To contribute to this area of research, a machine learning model capable of accurately predicting nuclear power plant response with minimal computational cost is proposed. To develop a robust machine learning model, the Best Estimate Plus Uncertainty (BEPU) approach was used to generate a database to train three models and select the best of the three. The BEPU analysis was performed by coupling Dakota platform with the best estimate thermal hydraulics code RELAP/SCDAPSIM/MOD 3.4. The Code Scaling Applicability and Uncertainty approach was adopted, along with Wilks' theorem to obtain a statistically representative sample that satisfies the USNRC 95/95 rule with 95% probability and 95% confidence level. The generated database was used to train three models based on Recurrent Neural Networks; specifically, Long Short-Term Memory, Gated Recurrent Unit, and a hybrid model with Long Short-Term Memory coupled to Convolutional Neural Network. In this paper, the System Engineering approach was utilized to identify requirements, stakeholders, and functional and physical architecture to develop this project and ensure success in verification and validation activities necessary to ensure the efficient development of ML meta-models capable of predicting of the nuclear power plant response.

• 제어로봇시스템학회:학술대회논문집
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• 1992.10b
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• pp.324-329
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• 1992

A physical phenomenon is observed through analysis of the Hodgkin-Huxley's model that is, according to Maxwell field equations a fired neuron can yield magnetic fields. The magnetic signals are an output of the neuron as some type of information, which may be supposed to be the conscious control information. Therefore, study on neural networks should take the field effect into consideration. Accordingly, a study on the behavior of a unit neuron in the field is made and a new neuron model is proposed. A mathematical Memory-Learning Relation has been derived from these new neuron equations, some concepts of memory and learning are introduced. Two learning theorems are put forward, and the control mechanisms of memory are also discussed. Finally, a theory, i.e. Neural Electromagnetic(NEM) field theory is advanced.