• Journal of the Korean Society for Nondestructive Testing
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• v.31 no.6
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• pp.616-625
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• 2011

Ensuring the designed prestress force is very important for the safety of prestressed concrete bridge. The loss of prestress force in tendon could significantly reduce load carrying capacity of the structure. In this study, an automated prestress-loss monitoring system for prestressed concrete girder using PZT-interface and wireless impedance sensor node is presented. The following approaches are carried out to achieve the objective. Firstly, wireless impedance sensor nodes are designed for automated impedance-based monitoring technique. The sensor node is mounted on the high-performance Imote2 sensor platform to fulfill high operating speed, low power requirement and large storage memory. Secondly, a smart PZT-interface designed for monitoring prestress force is described. A linear regression model is established to predict prestress-loss. Finally, a system of the PZT-interface interacted with the wireless sensor node is evaluated from a lab-scale tendon-anchorage connection of a prestressed concrete girder.

• Journal of Powder Materials
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• v.2 no.2
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• pp.158-164
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• 1995

Synthesis of the NiTi shape memory alloy using the thermal explosion mode of the self-propagating high-temperature synthesis has been investigated. The significant fractions of intermetallics phases were found to form at the Ti/Ni powder interface during the heating to the ignition temperature and seemed to influence the relative fraction of phases in the final products. As the heating rate to the ignition temperature was increased, the combustion temperature and the fraction of NiTi in the final reaction products were increased. The synthesis reaction under 70 MPa compressive pressure yielded a reaction product with 98% theoretical density.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.674-676
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• 2008

An electrostatic discharge (ESD) or a noise supplied from the outside has an effect on communication between the timing controller (TCON) and the memory element (EEPROM) through the interface between the timing controller and the memory element in liquid crystal displays (LCD). Therefore, we must apply ESD protection methods to LCD operating circuits for a normal operation. Our ESD protection circuit is to prevent from bi-directional communication errors between TCON and EEPROM due to an electrostatic discharge (ESD).

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.368.1-368.1
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• 2014

We proposed amorphous GeSe-based ReRAM device of metal-insulator-metal (M-I-M) structure. The operation characteristics of memory device occured unipolar switching characteristics. By introducing the concepts of valance-alternation-pairs (VAPs) and chalcogen vacancies, the unipolar resistive switching operation had been explained. In addition, the current transport behavior were analyzed with space charge effect of VAPs, Schottky emission in metal/GeSe interface and P-F emission by GeSe bulk trap in mind. The GeSe ReRAM device of M-I-M structure indicated the stable memory switching characteristics. Furthermore, excellent stability, endurance and retention characteristics were also verified.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.31-32
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• 2010

In our previous reports [1-3], electron transport for the switching and memory devices using alkyl thiol-tethered Ru-terpyridine complex compounds with metal-insulator-metal crossbar structure has been presented. On the other hand, among organic memory devices, a memory based on the OFET is attractive because of its nondestructive readout and single transistor applications. Several attempts at nonvolatile organic memories involve electrets, which are chargeable dielectrics. However, these devices still do not sufficiently satisfy the criteria demanded in order to compete with other types of memory devices, and the electrets are generally limited to polymer materials. Until now, there is no report on nonvolatile organic electrets using nano-interfaced organic monomer layer as a dielectric material even though the use of organic monomer materials become important for the development of molecularly interfaced memory and logic elements. Furthermore, to increase a retention time for the nonvolatile organic memory device as well as to understand an intrinsic memory property, a molecular design of the organic materials is also getting important issue. In this presentation, we report on the OFET memory device built on a silicon wafer and based on films of pentacene and a SiO2 gate insulator that are separated by organic molecules which act as a gate dielectric. We proposed push-pull organic molecules (PPOM) containing triarylamine asan electron donating group (EDG), thiophene as a spacer, and malononitrile as an electron withdrawing group (EWG). The PPOM were designed to control charge transport by differences of the dihedral angles induced by a steric hindrance effect of side chainswithin the molecules. Therefore, we expect that these PPOM with potential energy barrier can save the charges which are transported to the nano-interface between the semiconductor and organic molecules used as the dielectrics. Finally, we also expect that the charges can be contributed to the memory capacity of the memory OFET device.[4]

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.8
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• pp.59-63
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• 2015

This paper discusses the capacitance-voltage method in Metal-Oxide-Nitride-Oxide-Silicon (MONOS) devices to analyzed the characteristics of the top oxide/nitride, nitride/bottom oxide interface trap distribution. In the CV method, nitride trap density can be calculated based on the program characteristics of the nitride thickness variations. By applying this method, silicon rich nitride device found to have a larger trap density than stoichiometric nitride device. This result is consistent with previous studies. If this comparison analysis can be expected to result in improved reliability of the SONOS flash memory.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.3
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• pp.521-527
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• 2011

POWER PC series are common to the Central Processing Unit for Military Single Board Computer. Among them, G4 group, which contains the 74xx series supported by Freescale manufacturer is mainly used in the Military applications. We focus on the Interface between memory and controller. PCB stacking method, component routing, impedance matching and harsh environment for Military spec are the main constraints for implementation. Also, we developed memory as a module for the consideration of Military environments. The overall type of SBC should be designed by the form of 6U VME or 3U VME. Therefore this study suggests the electrically optimum Interface matching, Artwork technology based on the signal cross over and PCB stacking method on the harsh environment.

• Publications of The Korean Astronomical Society
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• v.22 no.3
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• pp.63-73
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• 2007

In this paper, we introduce the performance test results of digital data processing system for KVN (Korean VLBI Network). The digital data processing system for KVN consists of DAS (Data Acquisition System) and high-speed recorder which called Mark5B system. DAS system performs the digitalization of analog radio signal through ADS-1000 gigabit sampler with 1 Gsps/2-bit and process the digital filtering of digital signal. Mark5B system records the output data of DFB (Digital Filter Bank) with about 1 Gbps. In this paper, we carried out the preliminary evaluation experiments of the KVN digital data processing system connected between DAS system and Mark5B with VSI (VLBI Standard Interface) interface which is designed for compatible in each VLBI system. We first performed all of the KVN digital data processing system connected by VSI interface in the world. In factory inspection phase, we found that the DAS system has a memory read/write error in DSM (Digital Spectrometer) by analyzing the recorded data in Mark5B system. We confirmed that the DSM memory error has been correctly solved by comparing DSM results with Mark5B results. The effectiveness of KVN digital data processing system has been verified through the preliminary experiments such as data transmission, recording with VSI interface connection and data analysis between DSM and Mark5B system. In future work, we will perform the real astronomical observation by using the KVN 21m radio telescopes so as to verify its stability and performance.

• Transactions on Electrical and Electronic Materials
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• v.15 no.2
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• pp.73-76
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• 2014

$Pt/Al_2O_3/La_2Si_5O_x/SiO_2/Si$ charge trap memory capacitors were prepared, in which the $La_2Si_5O_x$ film was used as the charge trapping layer, and the effects of post annealing atmospheres ($NH_3$ and $N_2$) on their memory characteristics were investigated. $La_2O_3$ nanocrystallites, as the storage nodes, precipitated from the amorphous $La_2Si_5O_x$ film during rapid thermal annealing. The $NH_3$ annealed memory capacitor showed higher charge storage performances than either the capacitor without annealing or the capacitor annealed in $N_2$. The memory characteristics were enhanced because more nitrogen was incorporated at the $La_2Si_5O_x/SiO_2$ interface and interfacial reaction was suppressed after the $NH_3$ annealing treatment.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.9A
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• pp.1442-1450
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• 1999

In this paper, we present an efficient hardware architecture for the frame memory of the MPEG-2 video encoder. Both the total size of internal buffers and the number of logic gates are reduced by the proposed memory map which can provide an effective interface between MPEG-2 video encoder and the external DRAM. Furthermore, the proposed scheme can reduce the DRAM access time. To realize the frame memory hardware,$0.5\mu\textrm{m}$, VTI, vemn5a3 standard cell library is used. VHDL simulator and logic synthesis tool are used for hardware design and RTL (register transfer level) function verification. The frame memory hardware emulator of the proposed architecture is designed for gate-level function verification. It is expected that the proposed frame memory hardware using VHDL can achieve suitable performance for MPEG-2 MP@ML.