• 제목/요약/키워드: memory controller

검색결과 346건 처리시간 0.037초

Solving Continuous Action/State Problem in Q-Learning Using Extended Rule Based Fuzzy Inference System

  • Kim, Min-Soeng;Lee, Ju-Jang
    • Transactions on Control, Automation and Systems Engineering
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    • 제3권3호
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    • pp.170-175
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    • 2001
  • Q-learning is a kind of reinforcement learning where the agent solves the given task based on rewards received from the environment. Most research done in the field of Q-learning has focused on discrete domains, although the environment with which the agent must interact is generally continuous. Thus we need to devise some methods that enable Q-learning to be applicable to the continuous problem domain. In this paper, an extended fuzzy rule is proposed so that it can incorporate Q-learning. The interpolation technique, which is widely used in memory-based learning, is adopted to represent the appropriate Q value for current state and action pair in each extended fuzzy rule. The resulting structure based on the fuzzy inference system has the capability of solving the continuous state about the environment. The effectiveness of the proposed structure is shown through simulation on the cart-pole system.

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A vision-based robotic assembly system

  • Oh, Sang-Rok;Lim, Joonhong;Shin, You-Shik;Bien, Zeungnam
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1987년도 한국자동제어학술회의논문집(한일합동학술편); 한국과학기술대학, 충남; 16-17 Oct. 1987
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    • pp.770-775
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    • 1987
  • In this paper, design and development experiences of a vision based robotic assembly system for electronic components are described. Specifically, the overall system consists of the following three subsystems each of which employs a 16 bit Preprocessor MC 68000 : supervisory controller, real-time vision system, and servo system. The three microprocessors are interconnected using the time shared common memory bus structure with hardwired bus arbitration scheme and operated as a master-slave type in which each slave is functionally fixed in view of software. With this system architecture, the followings are developed and implemented in this research; (i) the system programming language, called 'CLRC', for man-machine interface including the robot motion and vision primitives, (ii) real-time vision system using hardwired chain coder, (iii) the high-precision servo techniques for high speed de motors and high speed stepping motors. The proposed control system were implemented and tested in real-time successfully.

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Hysterersis Compensation in SMA Actuators Through Numerical Inverse Preisach Model Implementation

  • Kha, Nguyen-Bao;Ahn, Kyoung-Kwan
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2005년도 ICCAS
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    • pp.2048-2053
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    • 2005
  • The aim of this paper is to compensate hysteresis phenomena in Shape Memory Alloy (SMA) actuators by using numerical inverse Preisach model. This is used to design a controller that correct hysteresis effects and improve accuracy for the displacement of SMA actuators. Firstly, hysteresis is identified by numerical Preisach model implementation. The geometrical interpretation from first order transition curves is used for hysteresis modeling. Secondly, the inverse Preisach model is formulated and incorporated in open-loop control system in order to obtain desired input-output relationship with hysteresis reducing. The experimental results for hysteresis compensation by using this method are also shown in this paper.

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내장형 32비트 RISC 콘트롤러의 VLSI 구현 (A VLSI implementation of 32-bit RISC embedded controller)

  • 이문기;최병윤;이승호
    • 전자공학회논문지A
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    • 제31A권10호
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    • pp.141-151
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    • 1994
  • this paper describes the design and implementation of a RISC processor for embedded control systems. This RISC processor integrates a register file, a pipelined execution unit, a FPU interface, a memory interface, and an instruction prefetcher. Its characteristics include both single cycle executions of most instructions in a 2 phase 20 MHz frequency and the worst case interrupt latency of 7 cycles with the vectored interrupt handling that makes it possible to be applicable to the real time processing system. For efficient handling of multi-cycle instructions, data stationary hardwired control scheme equippedwith cycle counter was used. This chip integrates about 139K transistors and occupies 9.1mm$\times$9.1mm in a 1.0um DLM CMOS technology. The power dissipation is 0.8 Watts from a 5V supply at 20 MHz operation.

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음성인식기반 스마트 의료조명 제어시스템 (Control System for Smart Medical Illumination Based on Voice Recognition)

  • 김민규;이수인;조현길
    • 대한임베디드공학회논문지
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    • 제8권3호
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    • pp.179-184
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    • 2013
  • A voice recognition technology as a technology fundament plays an important role in medical devices with smart functions. This paper describes the implementation of a control system that can be utilized as a part of illumination equipment for medical applications (IEMA) based on a voice recognition. The control system can essentially be divided into five parts, the microphone, training part, recognition part, memory part, and control part. The system was implemented using the RSC-4x evaluation board which is included the micro-controller for voice recognition. To investigate the usefulness of the implemented control system, the experiments of the recognition rate was carried out according to the input distance for voice recognition. As a result, the recognition rate of the control system was more than 95% within a distance between 0.5 and 2m. The result verified that the implemented control system performs well as the smart control system based for an IEMA.

A New Controller for Improvement of Response Time by Data Compression Using Color Space Conversion

  • Koo, Sung-Jo;Kim, Chang-Gon;An, Jong-Ki;Park, Man-Hyo;Yeo, Sang-Deog
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.II
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    • pp.863-864
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    • 2005
  • In recent years, we use overdriving scheme to improve the response time of the liquid crystal. Since conventional overdriving scheme uses memory to perform ideal processing, it is desired to reduce system cost by decreasing the data stored in these SDRAMs. As a general compression method, quantization, sub-sampling and Block Truncation Coding ( BTC ) are used, which process data in block base and cause block effect. So we proposed new data compression method by color space conversion. Because this method compresses luminance and chrominance signal by different ratio, it can efficiently reduce error of block effect in decompression image.

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Development of a Guide Robot with Real-Time Linux OS

  • Mun, Jun-Hak;Seo, Gon-Yeon;Kim, Jin-Oh
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2001년도 ICCAS
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    • pp.137.1-137
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    • 2001
  • A new method for a guide robot using Real-Time Linux OS is introduced in this paper. A guide robot is to guide people in museums or buildings. So it has to be more reliable and stable in its control system. In addition, it has to satisfy Real-Time operation requirement because it needs to react to changing environment prompty. The task includes localization, map building, collision avoidance, path planning, and user interface software. The modular guide robot is designed with Real-Time Linux OS, which is composed of many open sources for scheduler, interrupt dispatcher, fifos, shared memory, timer services. We developed application software to satisfy the given task. The developed guide robot moves at 0.2ms and the interrupt latency is less than 100$\mu\textrm{s}$ It is thought that the developed system can be a stable and low cost open architecture robot controller for ...

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ON LEARNING OF CNAC FOR MANIPULATOR CONTROL

  • Hwang, Heon;Choi, Dong-Y.
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1989년도 한국자동제어학술회의논문집; Seoul, Korea; 27-28 Oct. 1989
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    • pp.653-662
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    • 1989
  • Cerebellar Model Arithmetic Controller (CMAC) has been introduced as an adaptive control function generator. CMAC computes control functions referring to a distributed memory table storing functional values rather than by solving equations analytically or numerically. CMAC has a unique mapping structure as a coarse coding and supervisory delta-rule learning property. In this paper, learning aspects and a convergence of the CMAC were investigated. The efficient training algorithms were developed to overcome the limitations caused by the conventional maximum error correction training and to eliminate the accumulated learning error caused by a sequential node training. A nonlinear function generator and a motion generator for a two d.o.f. manipulator were simulated. The efficiency of the various learning algorithms was demonstrated through the cpu time used and the convergence of the rms and maximum errors accumulated during a learning process. A generalization property and a learning effect due to the various gains were simulated. A uniform quantizing method was applied to cope with various ranges of input variables efficiently.

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An efficient LIN MCU design for In-Vehicle Networks

  • Yeon, Kyu-Bong;Chong, Jong-Wha
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제13권5호
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    • pp.451-458
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    • 2013
  • This paper describes a design of LIN MCU using efficient memory accessing architecture which provides concurrent data and address fetch for faster communication. By using slew rate control it can reduce EMI emission while satisfying required communication specifications. To verify the efficiency of the LIN MCU, we developed a SoC and tested for several data packets. Measurements show that this LIN MCU improves network efficiency up to 17.19 % and response time up to 31.26 % for nominal cases. EMI radiation also can be reduced up to 10 dB.

FPGA기반의 KTX용 실시간 제어네트워크$(Tonard^*)$ 물리계층 개발 (The development of the KTX realtime control network$(Tornad^*)$ physical layer based on FPGA)

  • 황승곤;박재현
    • 한국철도학회:학술대회논문집
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    • 한국철도학회 2007년도 춘계학술대회 논문집
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    • pp.1735-1740
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    • 2007
  • Communication network in KTX (Korea Train eXpress), the express train system, has to transmit status variables periodically within tens of seconds and real-time control informations which has short reply like status transition or alarm. KTX uses $Tornad^*$ (TOken Ring Network Alsthom Device) network for this purpose. This network can send and receive messages which enable express train applications embedded in intelligence boards to communicate by itself. Layer 1, 2 of $Tornad^*$ is implemented with differential manchester encoding and IEEE 802.4 standard(token bus standard) respectively. To implement layer 1 and 2, we implemented twisted pair modem using FPGA for layer 1 and used MC68824 from Motorola for layer 2. MC68824 bus arbitration and memory controller is implemented using CPLD.

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