• 제목/요약/키워드: memory accuracy

검색결과 648건 처리시간 0.026초

히스테리시스 주 루프의 비례관계를 이용한 형상기억합금 엑츄에이터의 Preisach 모델 (Preisach Model of Shape Memory Alloy Actuators Using Proportional Relationship of The Major Loop of Hysteresis)

  • 최병준;이연정;최봉열
    • 제어로봇시스템학회논문지
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    • 제8권9호
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    • pp.736-746
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    • 2002
  • There has been a great demand for smart actuators in the field of micro-machines. However, the control accuracy of smart actuators, e.g., a shape memory alloy(SMA) and a piezoceramic actuator, is limited due to the inherent hysteresis nonlinearity. The Preisach hysteresis model has emerged as an appropriate model f3r the behavior of those smart actuators. Yet it is still not easy to construct a practical model of hysteresis using the classical Preisach model. Accordingly, in this paper, we propose a new simple method for modeling of the hysteresis nonlinearity of SMA. Using only the proportional relation of the major loop of hysteresis, the proposed method makes the computation of the Preisach model easy. We prove the efficacy of the proposed model through the comparative the experimentation with the classical Preisach model.

FPGA를 이용한 실시간 영상 워핑 구현 (An Implementation of Real-time Image Warping Using FPGA)

  • 류정래;이은상;도태용
    • 대한임베디드공학회논문지
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    • 제9권6호
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    • pp.335-344
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    • 2014
  • As a kind of 2D spatial coordinate transform, image warping is a basic image processing technique utilized in various applications. Though image warping algorithm is composed of relatively simple operations such as memory accesses and computations of weighted average, real-time implementations on embedded vision systems suffer from limited computational power because the simple operations are iterated as many times as the number of pixels. This paper presents a real-time implementation of a look-up table(LUT)-based image warping using an FPGA. In order to ensure sufficient data transfer rate from memories storing mapping LUT and image data, appropriate memory devices are selected by analyzing memory access patterns in an LUT-based image warping using backward mapping. In addition, hardware structure of a parallel and pipelined architecture is proposed for fast computation of bilinear interpolation using fixed-point operations. Accuracy of the implemented hardware is verified using a synthesized test image, and an application to real-time lens distortion correction is exemplified.

An Encrypted Speech Retrieval Scheme Based on Long Short-Term Memory Neural Network and Deep Hashing

  • Zhang, Qiu-yu;Li, Yu-zhou;Hu, Ying-jie
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제14권6호
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    • pp.2612-2633
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    • 2020
  • Due to the explosive growth of multimedia speech data, how to protect the privacy of speech data and how to efficiently retrieve speech data have become a hot spot for researchers in recent years. In this paper, we proposed an encrypted speech retrieval scheme based on long short-term memory (LSTM) neural network and deep hashing. This scheme not only achieves efficient retrieval of massive speech in cloud environment, but also effectively avoids the risk of sensitive information leakage. Firstly, a novel speech encryption algorithm based on 4D quadratic autonomous hyperchaotic system is proposed to realize the privacy and security of speech data in the cloud. Secondly, the integrated LSTM network model and deep hashing algorithm are used to extract high-level features of speech data. It is used to solve the high dimensional and temporality problems of speech data, and increase the retrieval efficiency and retrieval accuracy of the proposed scheme. Finally, the normalized Hamming distance algorithm is used to achieve matching. Compared with the existing algorithms, the proposed scheme has good discrimination and robustness and it has high recall, precision and retrieval efficiency under various content preserving operations. Meanwhile, the proposed speech encryption algorithm has high key space and can effectively resist exhaustive attacks.

다중셀 낸드 플래시 메모리의 3셀 CCI 모델과 이를 이용한 에러 정정 알고리듬 (A 3-cell CCI(Cell-to-Cell Interference) model and error correction algorithm for Multi-level cell NAND Flash Memories)

  • 정진호;김시호
    • 대한전자공학회논문지SD
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    • 제48권10호
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    • pp.25-32
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    • 2011
  • MLC NAND flash memory에서 cell간의 기생 커패시턴스 커플링으로 인해 발생하는 CCI에 의한 data error를 개선하기 위한 알고리듬을 제안하였다. 종래의 victim cell 주변 8-cell model보다 에러보정 알고리듬에 적용이 용이한 3-cell model을 제시하였다. 3-cell CCI model의 성능을 입증하기 위해 30nm와 20nm급 공정의 MLC NAND flash memory의 data분포를 분석하여, 주변 cell의 data pattern에 의한 victim cell의 Vth shift관계를 확인하였다. 측정된 Vth분포 data에 MatLab을 이용하여 제안된 알고리듬을 적용하는 경우 BER이 LSB에서는 28.9%, MSB에는 19.8%가 개선되었다.

형상기억합금을 이용한 열박음 공구홀더 개발 (Development of Shrink-Fit Tool Holder using Shape Memory Alloys)

  • 신우철;노승국;김병섭;박종권
    • 한국생산제조학회지
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    • 제19권6호
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    • pp.889-894
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    • 2010
  • Conventional shrink-fit tool holders have positive features, such as high accuracy, high strength, high stiffness and low sensitivity to centrifugal forces, but they require heavy investments for heating and cooling equipment. Generally the heating equipment has to heat the tool holder up to $200{\sim}300^{\circ}C$ for tool changes. This paper introduces a novel shrink-fit tool holder that is able to unclamp a tool at $40{\sim}50^{\circ}C$. This feature makes it possible to switch between the clamped and unclamped states by using a simple device, which has lower power, smaller size and lower cost than the heating equipment of the conventional shrink-fit tool holders. The proposed shrink-fit tool holder is able to expand its tool hole by using the shape memory alloys which are integrated in the tool holder body. Performances of the SMA shrink-fit tool holder were evaluated experimentally. The experimental results confirm that the proposed tool holder is feasible in aspects of clamping/unclamping operations, clamping force and repeatability of tool setup.

다중 해시함수 기반 데이터 스트림에서의 아이템 의사 주기 탐사 기법 (Finding Pseudo Periods over Data Streams based on Multiple Hash Functions)

  • 이학주;김재완;이원석
    • 한국IT서비스학회지
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    • 제16권1호
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    • pp.73-82
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    • 2017
  • Recently in-memory data stream processing has been actively applied to various subjects such as query processing, OLAP, data mining, i.e., frequent item sets, association rules, clustering. However, finding regular periodic patterns of events in an infinite data stream gets less attention. Most researches about finding periods use autocorrelation functions to find certain changes in periodic patterns, not period itself. And they usually find periodic patterns in time-series databases, not in data streams. Literally a period means the length or era of time that some phenomenon recur in a certain time interval. However in real applications a data set indeed evolves with tiny differences as time elapses. This kind of a period is called as a pseudo-period. This paper proposes a new scheme called FPMH (Finding Periods using Multiple Hash functions) algorithm to find such a set of pseudo-periods over a data stream based on multiple hash functions. According to the type of pseudo period, this paper categorizes FPMH into three, FPMH-E, FPMH-PC, FPMH-PP. To maximize the performance of the algorithm in the data stream environment and to keep most recent periodic patterns in memory, we applied decay mechanism to FPMH algorithms. FPMH algorithm minimizes the usage of memory as well as processing time with acceptable accuracy.

초정밀 박육 플라스틱 제품 성형기술에 관한 연구 (A study on the injection molding technology for thin wall plastic part)

  • 허영무;신광호
    • Design & Manufacturing
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    • 제10권2호
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    • pp.50-54
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    • 2016
  • In the semiconductor industry the final products were checked for several environments before sell the products. The burning test of memory and chip was implemented in reliability for all of parts. The memory and chip were developed to high density memory and high performance chip, so circuit design was also high integrated and the test bed was needed to be thin and fine pitch socket. LGA(Land Grid Array) IC socket with thin wall thickness was designed to satisfy this requirement. The LGA IC socket plastic part was manufacture by injection molding process, it was needed accuracy, stiffness and suit resin with high flowability. In this study, injection molding process analysis was executed for 2 and 4 cavities moldings with runner, gate and sprue. The warpage analysis was also implemented for further gate removal process. Through the analyses the total deformations of the moldings were predicted within maximum 0.05mm deformation. Finally in consideration of these results, 2 and 4 cavities molds were designed and made and tested in injection molding process.

Implementation of functional expansion tally method and order selection strategy in Monte Carlo code RMC

  • Wang, Zhenyu;Liu, Shichang;She, Ding;Su, Yang;Chen, Yixue
    • Nuclear Engineering and Technology
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    • 제53권2호
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    • pp.430-438
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    • 2021
  • The spatial distribution of neutron flux or reaction rate was calculated by cell or mesh tally in traditional Monte Carlo simulation. However, either cell or mesh tally leads to the increase of memory consumption and simulation time. In this paper, the function expansion tally (FET) method was developed in Reactor Monte Carlo code RMC to solve this problem. The FET method was applied to the tallies of neutron flux distributions of uranium block and PWR fuel rod models. Legendre polynomials were used in the axial direction, while Zernike polynomials were used in the radial direction. The results of flux, calculation time and memory consumption of different expansion orders were investigated, and compared with the mesh tally. Results showed that the continuous distribution of flux can be obtained by FET method. The flux distributions were consistent with that of mesh tally, while the memory consumption and simulation time can be effectively reduced. Finally, the convergence analysis of coefficients of polynomials were performed, and the selection strategy of FET order was proposed based on the statistics uncertainty of the coefficients. The proposed method can help to determine the order of FET, which was meaningful for the efficiency and accuracy of FET method.

Verification of Effectiveness and Satisfaction Survey for the Korean Computer-based Cognitive Rehabilitation Programs(CoTras)

  • Chae, Soo-Gyung
    • International Journal of Internet, Broadcasting and Communication
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    • 제14권3호
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    • pp.230-242
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    • 2022
  • The purpose of this study was to verify the effectiveness of the computerized cognitive rehabilitation program in which areas and to suggest effective ways to utilize the program in the future, being conducted for 20 college students. We lasted this study from May 3 to 23, 2021. As a result of analyzing the groups using the Computer-based Cognitive Rehabilitation Program (CoTras), in terms of the difference in accuracy for the case of visual perception group B was statistically significantly improved than group C(p<0.05). In the case of attention, memory, and orientation, there was no significant difference between groups(p>0.05). In the case of reaction time difference, there was no significant difference between groups in visual perception, concentration, memory, and orientation(p>0.05). And in order to improve attention and visual perception, it is recommended to conduct the program three times with a duration of 20 minutes, and in order to improve orientation and memory, it can be said that it is helpful to conduct one experiment for at least 30 minutes rather than conducting short and frequent experiments. Through this study, we found that it is effective to apply different times according to each area to improve cognitive function. In other words, depending on the purpose of which cognitive function is to be improved, the duration of the program should be applied differently.

Count-Min HyperLogLog : 네트워크 빅데이터를 위한 카디널리티 추정 알고리즘 (Count-Min HyperLogLog : Cardinality Estimation Algorithm for Big Network Data)

  • 강신정;양대헌
    • 정보보호학회논문지
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    • 제33권3호
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    • pp.427-435
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    • 2023
  • 카디널리티 추정은 실생활의 많은 곳에서 사용되며, 큰 범위의 데이터를 처리하는 데 근본적 문제이다. 인터넷이 빅데이터의 시대로 넘어가며 데이터의 크기는 점점 커지고 있지만, 작은 온칩 캐시 메모리만을 이용하여 카디널리티 추정이 이뤄진다. 메모리를 효율적으로 사용하기 위해서, 지금까지 많은 방법이 제안되었다. 그러나, 이러한 알고리즘에서는 estimator 간의 노이즈 발생으로 인해 정확도가 떨어지는 일이 발생한다. 이 논문에서는 노이즈를 최소화하는데 중점을 뒀다. 우리는 여러 개의 데이터 구조를 제안하여 각 estimator가 데이터 구조 수만큼의 추정값을 가지고, 이 중 가장 작은 값을 선택하여 노이즈를 최소화한다. 실험을 통해 이 방법이 이전의 가장 좋은 방법과 비교했을 때, 플로우당 1 bit와 같은 작은 메모리를 사용하면서 더 좋은 성능을 보이는 것을 확인했다.