• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.6
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• pp.522-529
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• 2014

This study proposes an isolation amplifier circuit for the sensing and feedback of inverter DC-link voltage, which is inevitable for the precise control of inverter output voltage. The isolation amplifier consists of a pulse-width modulator and a pulse transformer with dual secondary windings. The accuracy of the proposed circuit depends on the precise matching of filter parameters in dual secondary circuits. The influences of parameter inaccuracy on the amplifier performances are analyzed. A modified circuit is proposed to reduce the dependency on filter parameters. The validity of the proposed method is verified through simulation and experiment.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.7 s.361
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• pp.23-28
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• 2007

A dual-band GaAs FET low noise amplifier (LNA) with an input LC-tank circuit is designed using inductance source feedback for wireless LAN, and output matching is realized with low-pass Cheyshev filter impedance transforming circuit. Some design techniques for dual band LNA have been developed including input and output design equations. The measured results shows close agreement with the predicted performance.

• Journal of electromagnetic engineering and science
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• v.14 no.4
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• pp.342-345
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• 2014

An active frequency doubler monolithic microwave integrated circuit (MMIC) for E-band transceiver applications is presented in this letter. This MMIC has been fabricated in a commercial $0.1-{\mu}m$ GaAs pseudomorphic high electron mobility transistor (pHEMT) process on a 2-mil thick substrate wafer. The fabricated MMIC chip has been measured to have a high output power performance of over 13 dBm with a high fundamental leakage suppression of more than 38 dBc in the frequency range of 71 to 86 GHz under an input signal condition of 10 dBm. A microstrip coupled line is used at the output circuit of the doubler section to implement impedance matching and simultaneously enhance the fundamental leakage suppression. The fabricated chip is has a size of $2.5mm{\times}1.2mm$.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.1
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• pp.13-20
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• 2001

In this appear, we proposed the new current mirror has large output resistance and excellent current matching characteristics. If supply voltage were lowered under the conventional CMOS operational amplifier, the wing of out put power could be restricted. So, the paper suggests a new way of differential operational amplifier circuit to solve the problem. The paper proposes that a new current mirror increases output swing and has a stable operation. We compare and verify characteristics of the proposed current mirror with the cascoded current mirror and the regulated current mirror through simulation.

• Journal of Korea Multimedia Society
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• v.20 no.7
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• pp.1024-1029
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• 2017

A novel analytic solution has been derived for the bird-cage receiver coil of a magnetic resonance imaging (MRI) system, which is widely used in 3-dimensional medical imaging, by transforming the coil into an equivalent circuit model by using a transmission matrix-based circuit analysis. The bird-cage coil composed of N legs is divided into a cell for which input impedance is to be analyzed and the remaining N-1 cells, and then a transmission matrix corresponding to the N-1 cells is converted into a circuit to transform the 3-dimensional bird-cage coil into the 2-dimensional equivalent circuit model, which is suitable to derive the analytic solution for the input impedance. The proposed method derives directly the analytic solution for the input impedance at an arbitrary point of the coil unlike the conventional analytic solution of a bird-cage coil, so that it can be used not only for resonance frequency calculations but also for various coil characteristics analyses. Since the analytic solution agreed well with the results of computational simulations, it can be useful for the impedance matching of a coil and the analysis and the design of a multi-tune bird-cage coil.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.11
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• pp.1034-1046
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• 2013

In this paper, a design of a GaN HEMT power amplifier using output matching circuit with arbitrary harmonic impedances is presented. The adopted GaN HEMT device, TGF2023-02 of TriQuint Semiconductor, was packaged in commercial package. The optimal impedances of the GaN HEMT package are extracted from load-pull simulation at package input and output reference planes. The targets of load-pull simulation are the highest output power at fundamental frequency and the highest efficiency at $2^{nd}$ and $3^{rd}$ harmonic frequencies. Because of fixture in the package, the extracted impedances shows arbitrary harmonic impedances. In order to match the optimal impedances, output matchin circuit which has 4 transmission lines is presented. Characteristic impedances and electrical lengths of the transmission lines are mathmatically calculated. The power amplfiier with $54.6{\times}40mm^2$ shows the output power of 8 W at the fundamental frequency of 2.5 GHz, the efficiency above 55 %, and harmonic suppression of above 35 dBc at the $2^{nd}$ and the $3^{rd}$ harmonics.

• ETRI Journal
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• v.42 no.5
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• pp.781-789
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• 2020

In this study, an E-band low-noise amplifier (LNA) monolithic microwave integrated circuit (MMIC) has been designed using silicon-germanium 130-nm bipolar complementary metal-oxide-semiconductor technology to suppress unwanted signal gain outside operating frequencies and improve the signal gain and noise figures at operating frequencies. The proposed impedance-controllable filter has series (R_s) and parallel (R_p) resistors instead of a conventional inductor-capacitor (L-C) filter without any resistor in an interstage matching circuit. Using the impedance-controllable filter instead of the conventional L-C filter, the unwanted high signal gains of the designed E-band LNA at frequencies of 54 GHz to 57 GHz are suppressed by 8 dB to 12 dB from 24 dB to 26 dB to 12 dB to 18 dB. The small-signal gain S₂₁ at the operating frequencies of 70 GHz to 95 GHz are only decreased by 1.4 dB to 2.4 dB from 21.6 dB to 25.4 dB to 19.2 dB to 24.0 dB. The fabricated E-band LNA MMIC with the proposed filter has a measured S₂₁ of 16 dB to 21 dB, input matching (S₁₁) of -14 dB to -5 dB, and output matching (S₂₂) of -19 dB to -4 dB at E-band operating frequencies of 70 GHz to 95 GHz.

• Journal of Satellite, Information and Communications
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• v.1 no.1
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• pp.59-64
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• 2006

The broadband power detector for power amplitude envelope detection of the direct-conversion Six-port output signal was designed and implemented in this paper. The power detector should be linearly operated to produce the linear amplitude and phase signal for input RF signals in required broadband frequency range. The power detector should be designed under conditions of matching circuit with low VSWR, which protect unbalanced phase signal from reflection signal due to mismatch between the output port of a six-port and the input port of a power detector. The designed power detectors, which were implemented in L-band with 50 ohm matching and Ku-band with multiple LC matching circuits and isolator, respectively, were analyzed in viewpoints of the utilization as a power detector of direct conversion Six-port. The dynamic range of designed power detectors were also measured and rvaluated as a power detector of Six-port circuit.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.2
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• pp.449-455
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• 2004

This paper presents a novel defect detection method for one chip RF front end with fault detection circuits using input matching measurement. We present a BIST circuit using 40.25{\mu}m$ CMOS technology. We monitor the input transient voltage of the RF front end to differentiate faulty and fault-free RF front end. Catastrophic as well as parametric variation fault models are used to simulate the faulty response of the RF front end. This technique has several advantages with respect to the standard approach based on current test stimulus and frequency domain measurement. Because DUT and fault detection circuits are implemented in the same chip, this test technique only requires use of digital voltmeter (RMS meter) and RF voltage source generator for simpleand inexpensive testing.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.47 no.2
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• pp.35-42
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• 2010

In this study, crosstalk between dominant interconnect pairs in an A/D converter circuit is analyzed in frequency domain and effects of termination conditions on crosstalk are described, based on the practical circuit conditions. An A/D converter circuit is a mixed circuit where both clean and noisy signals coexist such that the circuit probably suffers from distortion by crosstalk. An analog input signal and the reference voltage signal, which dominate the overall conversion performance of the A/D converter circuit, are ready to be distorted by crosstalk and include specific termination conditions, such as non-matching and capacitive termination, respectively. Thus, this study presents the model of crosstalk considering impedance mismatch at both ends and analyzes effects of the practical termination conditions in the analog input and the reference voltage interconnects on crosstalk. A typical circuit configuration of the two interconnects is described and crosstalk including near-end and far-end termination impedances is modeled. Effects of the near-end impedance mismatch in the analog input interconnect and the far-end capacitive termination in the reference voltage interconnect are estimated in the frequency domain by using the model of crosstalk and experiments are performed to confirm the estimated results. Microstrip lines are used as interconnects, involving the increase of loss in high frequencies.