• Title/Summary/Keyword: low-loss

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Safety and Efficacy of Low Level Laser for Alopecia : A Systematic Review (탈모에 대한 레이저의 안전성 및 유효성 : 체계적 문헌 고찰)

  • Lee, Bo-Ram;Lee, Ma-Eum;Ko, Kyoung-Sook;Seo, Hyung-Sik
    • The Journal of Korean Medicine Ophthalmology and Otolaryngology and Dermatology
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    • v.32 no.4
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    • pp.90-100
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    • 2019
  • Objectives : The purpose of this study is to determine the safety and efficacy of low level laser. Methods : We searched 11 electronic databases(Pubmed, CAJ, EMBASE, Medline, Cochrane Library, KMBASE, KISS, KISTI, NDSL, RISS, Oasis) up to March 2019. We included randomized controlled trials(RCTs) using low level laser for alopecia. The methodological quality of each RCT was assessed by the Cochrane risk of bias tool. Results : 8 RCT studies were eligible in our review. The meta-analysis of 2 studies showed favorable results for the use of low level laser with minoxidil 5% than minoxidil 5% and 6 studies showed favorable results for the use of low level laser than placebo light. The results of meta-analysis showed that low-level laser has an efficacy on alopecia. There were no serious side effects or adverse effects. High risk of bias were observed in all studies. Conclusion : Now limited evidence is available to support low level laser for alopecia and further well-designed RCTs should be encouraged.

On Inflated Achievable Sum Rate of 3-User Low-Correlated SC NOMA

  • Chung, Kyuhyuk
    • International journal of advanced smart convergence
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    • v.10 no.3
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    • pp.1-9
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    • 2021
  • In the Internet of Thing (IoT) framework, massive machine-type communications (MMTC) have required large spectral efficiency. For this, non-orthogonal multiple access (NOMA) has emerged as an efficient solution. Recently, a non-successive interference cancellation (SIC) NOMA scheme has been implemented without loss. This lossless NOMA without SIC is achieved via correlated superposition coding (SC), in contrast to conventional independent SC. However, conventional minimum high-correlated SC for only 2-user NOMA schemes was investigated in the lossless 2-user non-SIC NOMA implementation. Thus, this paper investigates a 3-user low-correlated SC scheme, especially for an inflated achievable sum rate, with a design of 3-user low-correlated SC. First, we design the 3-user low-correlated SC scheme by taking the minimum sum rate between 3-user SIC NOMA and 3-user non-SIC NOMA, both with correlated SC. Then, simulations demonstrate that the low correlation in the direction of the first user's power allocation inflates the sum rate in the same direction, compared to that of conventional minimum high-correlated SC NOMA, and such inflation due to low correlation is also observed similarly, in the direction of the second user's power allocation. Moreover, we also show that the two low correlations of the first and second users inflates doubly in the both directions of the first and second users' power allocations. As a result, the proposed 3-user low-correlated SC could be considered as a promising scheme, with the inflated sum rate in the future fifth-generation (5G) NOMA networks.

An Ultra Wideband Low Noise Amplifier in 0.18 μm RF CMOS Technology

  • Jung Ji-Hak;Yun Tae-Yeoul;Choi Jae-Hoon
    • Journal of electromagnetic engineering and science
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    • v.5 no.3
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    • pp.112-116
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    • 2005
  • This paper presents a broadband two-stage low noise amplifier(LNA) operating from 3 to 10 GHz, designed with 0.18 ${\mu}m$ RF CMOS technology, The cascode feedback topology and broadband matching technique are used to achieve broadband performance and input/output matching characteristics. The proposed UWB LNA results in the low noise figure(NF) of 3.4 dB, input/output return loss($S_{11}/S_{22}$) of lower than -10 dB, and power gain of 14.5 dB with gain flatness of $\pm$1 -dB within the required bandwidth. The input-referred third-order intercept point($IIP_3$) and the input-referred 1-dB compression point($P_{ldB}$) are -7 dBm and -17 dBm, respectively.

Design and Implementation of Low-Voltage and Lour-Power Driving Method for Plasma Display Panel (저 전압, 저 전력 Plasma Display Panel 구동 회로의 설계 및 구현)

  • Kim, Sang-Bong;Choi, Jin-Ho;Jang, Yun-Sepk
    • Proceedings of the IEEK Conference
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    • 2004.06b
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    • pp.601-604
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    • 2004
  • In this paper, we propose a driving circuit that can be operated with a lower voltage than that of the conventional circuit without reducing the discharge voltage. the circuit proposed in this paper has a merit to improve the electrical characteristics because it can be composed of switching devices with low voltage. The operation and efficiency using real devices. The features of the circuit proposed in this paper are as follows; the power loss can be decreased by the use of low voltage, the cost if the driving circuit for PDP can be reduced by the use of switching devices operated with low voltage.

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Design of Broadband Hybrid Mixer using Dual-Gate FET (이중게이트 FET 를 이용한 광대역 하이브리드 믹서 설계)

  • Jin, Zhe-Jun;Lee, Kang-Ho;Koo, Kyung-Heon
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.197-200
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    • 2005
  • This paper presents the design of a broadband hybrid mixer using dual-gate FET topology with a low-pass filter which improves return loss of output to isolate RF and LO signal. The low-pass filter shows the isolation whose RF and LO signal is better than 40 dBc at 2 GHz and 5 GHz band. The dual-gate mixer which has been designed by using cascade topology operates when the lower FET is biased in linear region and the upper FET is in saturation. The input matching circuit has been designed to have conversion gain from 2 GHz to 6 GHz. The designed mixer with low-pass filter shows the conversion gain of better than 7 dB from 2 GHz to 6 GHz at a low LO power level of 0 dBm with the fixed IF frequency of 21.4 MHz.

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Efficient Parallel Block-layered Nonbinary Quasi-cyclic Low-density Parity-check Decoding on a GPU

  • Thi, Huyen Pham;Lee, Hanho
    • IEIE Transactions on Smart Processing and Computing
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    • v.6 no.3
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    • pp.210-219
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    • 2017
  • This paper proposes a modified min-max algorithm (MMMA) for nonbinary quasi-cyclic low-density parity-check (NB-QC-LDPC) codes and an efficient parallel block-layered decoder architecture corresponding to the algorithm on a graphics processing unit (GPU) platform. The algorithm removes multiplications over the Galois field (GF) in the merger step to reduce decoding latency without any performance loss. The decoding implementation on a GPU for NB-QC-LDPC codes achieves improvements in both flexibility and scalability. To perform the decoding on the GPU, data and memory structures suitable for parallel computing are designed. The implementation results for NB-QC-LDPC codes over GF(32) and GF(64) demonstrate that the parallel block-layered decoding on a GPU accelerates the decoding process to provide a faster decoding runtime, and obtains a higher coding gain under a low $10^{-10}$ bit error rate and low $10^{-7}$ frame error rate, compared to existing methods.

Low Phase Noise CMOS VCO with Hybrid Inductor

  • Ryu, Seonghan
    • IEIE Transactions on Smart Processing and Computing
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    • v.4 no.3
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    • pp.158-162
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    • 2015
  • A low phase noise CMOS voltage controlled oscillator(VCO) for multi-band/multi-standard RF Transceivers is presented. For both wide tunability and low phase noise characteristics, Hybrid inductor which uses both bondwire inductor and planar spiral inductor in the same area, is proposed. This approach reduces inductance variation and presents high quality factor without custom-designed single-turn inductor occupying large area, which improves phase noise and tuning range characteristics without additional area loss. An LC VCO is designed in a 0.13um CMOS technology to demonstrate the hybrid inductor concept. The measured phase noise is -121dBc/Hz at 400KHz offset and -142dBc/Hz at 3MHz offset from a 900MHz carrier frequency after divider. The tuning range of about 28%(3.15 to 4.18GHz) is measured. The VCO consumes 7.5mA from 1.3V supply and meets the requirements for GSM/EDGE and WCDMA standard.

The investigation of field condition on flood protection of substation and underground power equipment (pad-mounted transformers & switches) (수변전실 및 지중 배전기기의 침수 방지 관련 현장 조사 분석)

  • Kim, Gi-Hyun;Choi, Myeong-Il;Bae, Suk-Myong;Lee, Jae-Yong
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2007.11a
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    • pp.327-331
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    • 2007
  • Inundation of substation and underground power equipment(pad-mounted transformers & switches) breaks out every summer season in low-lying downtown and low-lying shore by localized heavy rain, typhoon and tidal wave. In case inundation of substation and underground power equipment, it occurs a great economic loss owing to recovery time and events of electric shock occur by inundation electrical facility. So we search the damage situation and installation situations. Therefore we propose the necessity of protection of flood at low-lying downtown and low-tying shore. This paper will be used to present a reform proposal of electrical related law about flood protection of existing power equipment.

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A study on the Design of a stable Substrate Bias Generator for Low power DRAM's (DRAM 의 저전력 구현을 위한 안정한 기판전압 발생기 설계에 관한 연구)

  • 곽승욱;성양현곽계달
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.703-706
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    • 1998
  • This paper presents an efficient substrate-bias generator(SBG)for low-power, high-density DRAM's The proposed SBG can supply stable voltage with switching the supply voltage of driving circuit, and it can substitude the small capacitance for the large capacitance. The charge pumping circuit of the SBG suffere no VT loss and is to be applicable to low-voltage DRAM's. Also it can reduce the power consumption to make VBB because of it's high pumping efficiency. Using biasing voltage with positive temperature coefficient, VBB level detecting circuit can detect constant value of VBB against temperature variation. VBB level during VBB maintaining period varies 0.19% and the power dissipation during this period is 0.16mw. Charge pumping circuit can make VBB level up to -1.47V using VCC-1.5V, and do charge pumping operation one and half faster than the conventional ones. The temperature dependency of the VBB level detecting circuit is 0.34%. Therefore the proposed SBG is expected to supply a stable VBB with less power consumption when it is used in low power DRAM's.

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Diode Stresses Reduction Of Asymmetrical Half-Bridge Converter Using Hybrid Control Scheme (하이브리드 제어기법을 이용한 Asymmetrical 하프 브리지 컨버터의 다이오드 스트레스 저감기법)

  • Joh, Chahng-Gyu;Lee, Dong-Yun;Kim, Kyong-Hwan;Hyun, Dong-Seok
    • Proceedings of the KIEE Conference
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    • 2003.04a
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    • pp.221-223
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    • 2003
  • This paper presents a new hybrid control method of asymmetrical/symmetrical half-bridge converter (AHBC/SHBC) with low voltage stress of the diodes. The proposed new control scheme is executed by using feedback of the input voltage and then can decide operation of the converter is divided into two ranges, which are asymmetrical control and symmetrical control, So the proposed control scheme has many advantages such as a low rated voltage of the secondary diodes, and low conduction loss according to the low voltage drop. The proposed control scheme is verified by simulated results.

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