• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.188.1-188.1
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• 2014

Aluminum is widely used as a material for electrode on silicon based devices. Especially, aluminum films are used as backside and front-side electrodes in silicon quantum dot (QD) solar cells. In this point, the diffusion of aluminum is very important for the enhancement of power conversion efficiency by improvement of contact property. Aluminum was deposited on a Si (100) wafer and a Si QD layer by ion beam sputter system with a DC ion gun. The Si QD layer was fabricated by $1100^{\circ}C$ annealing of the $SiO_2/SiO_1$ multilayer film grown by ion beam sputtering deposition. Cs ion beam with a low energy and a grazing incidence angle was used in SIMS depth profiling analysis to obtain high depth resolution. Diffusion behavior of aluminum in the Al/Si and Al/Si QD interfaces was investigated by secondary ion mass spectrometry (SIMS) as a function of heat treatment temperature. It was found that aluminum is diffused into Si substrate at $450^{\circ}C$. In this presentation, the effect of heat treatment temperature and Si nitride diffusion barrier on the diffusion of Al will be discussed.

• Korean Journal of Materials Research
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• v.20 no.12
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• pp.649-653
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• 2010

In this paper, double texturization of multi crystalline silicon solar cells was studied with laser and reactive ion etching (RIE). In the case of multi crystalline silicon wafers, chemical etching has problems in producing a uniform surface texture. Thus various etching methods such as laser and dry texturization have been studied for multi crystalline silicon wafers. In this study, laser texturization with an Nd:$YVO_4$ green laser was performed first to get the proper hole spacing and $300{\mu}m$ was found to be the most proper value. Laser texturization on crystalline silicon wafers was followed by damage removal in acid solution and RIE to achieve double texturization. This study showed that double texturization on multi crystalline silicon wafers with laser firing and RIE resulted in lower reflectance, higher quantum yield and better efficiency than that process without RIE. However, RIE formed sharp structures on the silicon wafer surfaces, which resulted in 0.8% decrease of fill factor at solar cell characterization. While chemical etching makes it difficult to obtain a uniform surface texture for multi crystalline silicon solar cells, the process of double texturization with laser and RIE yields a uniform surface structure, diminished reflectance, and improved efficiency. This finding lays the foundation for the study of low-cost, high efficiency multi crystalline silicon solar cells.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.145-145
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• 2011

Light-emitting diodes (LEDs) based on III-nitrides compound semiconductors have achieved a high performance device available for display and illumination sector. However, the conventional c-plane oriented LED structures are still showing several problems given by the quantum confined Stark effect (QCSE) due to the effects of strong piezoelectric and spontaneous polarizations. The QCSE results in spatial separation of electron and hole wavefunctions in quantum wells, thereby decreasing the internal quantum efficiency and red-shifting the emission wavelength. Due to demands for improvement of device performance, nonpolar structure has been attracting attentions, since the quantum wells grown on nonpolar templates are free from the QCSE. However, current device performance for nonpolar LEDs is still lower than those for conventional LEDs. In this study, we discuss the potential possibilities of nonpolar LEDs for commercialization. In this study, we characterized current-light output power relation of the a-plane InGaN/GaN LEDs structures with the variation of quantum well structures. On-wafer electroluminescence measurements were performed with short pulse (10 us) and low duty factor (1 %) conditions applied for eliminating thermal effects. The well and barrier widths, and indium compositions in quantum well structures were changed to analyze the efficiency droop phenomenon.

• Proceedings of the KIEE Conference
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• 1998.07g
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• pp.2518-2520
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• 1998

Silicon can be reactive ion etched (RIE) either isotropically or anisotropically. In this paper, a new micromachining technology combining these two etching characteristics is proposed. In the proposed method, the fabrication steps are as follows. First. a polysilicon layer, which is used as the bottom electrode, is deposited on the silicon wafer and patterned. Then the silicon substrate is etched anisotropically to a few micrometer depth that forms a cavity. Then an PECVD oxide layer is deposited to passivate the cavity side walls. The oxide layers at the top and bottom faces are removed while the passivation layers of the side walls are left. Then the substrate is etched again but in an isotropic etch condition to form a round trench with a larger radius than the anisotropic cavity. Then a sacrificial PECVD oxide layer is deposited and patterned. Then a polysilicon structural layer is deposited and patterned. This polysilicon layer forms a pivot structure of a rocker-arm. Finally, oxide sacrificial layers are etched away. This new micromachining technology is quite simpler than conventional method to fabricate joint structures, and the devices that are fabricated using this technology do not require a flexing structure for motion.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.525-526
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• 2007

Over-polishing is required to completely remove the material of top surface across whole wafer, in spite of a local dishing problem. This paper introduces the two-step CMP process using protective layer and high selectivity slurry, to reduce dishing amount and variation. The 30nm thick protective oxide layer was deposited on the pattern, and then polished with low selectivity slurry to partially remove the projected area while suppressing the removal rate of the recessed area. After the first step CMP process, high selectivity slurry was used to minimize the dishing amount and variation in pattern structure. Experimental result shows that two-step CMP process can be successfully applicable to reduce the dishing defect generated in over-polishing.

• Korean Journal of Materials Research
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• v.22 no.12
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• pp.701-705
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• 2012

The effects of clay, aluminum hydroxide, and carbon powder on the sintering of a Si/SiC mixture from photovoltaic silicon-wafer production were investigated. Sintering temperature was fixed at $1,350^{\circ}C$ and the sintered bodies were characterized by SEM and XRD to analyze the microstructure and to measure the apparent porosity, absorptivity, and apparent density. The XRD peak intensity of SiC in the sintered body was increased by adding 5% carbon to the Si/SiC mixture. From this result, it is confirmed that Si in the Si/SiC mixture had reacted with the added carbon. Addition of aluminum hydroxide decreased the cristobalite phase and increased the stable mullite phase. The measurement of the physical properties indicates that adding carbon to the Si/SiC mixture enables us to obtain a dense sintered body that has high apparent density and low absorptivity. The sintered body produced from the Si/SiC mixture with aluminum hydroxide and carbon powder as sintering additives can be applied to diesel particulate filters or to heat storage materials, etc., since it possesses high thermal conductivity, and anticorrosion and antioxidation properties.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.418.2-418.2
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• 2016

$Al_2O_3$ passivation layer has excellent passivation properties at p-type Si surface. This $Al_2O_3$ layer forms thin $SiO_2$ layer at the interface. There were some studies about inserting thermal oxidation process to replace naturally grown oxide during $Al_2O_3$ deposition. They showed improving passivation properties. However, thermal oxidation process has disadvantage of expensive equipment and difficult control of thin layer formation. Wet chemical oxidation has advantages of low cost and easy thin oxide formation. In this study, $Al_2O_3$/$SiO_2/Si(100)$ interface was formed by wet chemical oxidation and PA-ALD process. $SiO_2$ layer at Si wafer was formed by $HCl/H_2O_2$, $H_2SO_4/H_2O_2$ and $HNO_3$, respectively. 20nm $Al_2O_3$ layer on $SiO_2/Si$ was deposited by PA-ALD. This $Al_2O_3/SiO_2/Si(100)$ interface were characterized by capacitance-voltage characteristics and quasi-steady-state photoconductance decay method.

• Bulletin of the Korean Chemical Society
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• v.32 no.4
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• pp.1298-1302
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• 2011

This study describes the development of an electrochemical array immunochip for the detection of IgG. Interdigitated immunochip platforms were fabricated by sputtering gold on a glass wafer by using MEMS process and then were coated with Eudragit S100, an enteric polymer, forming an insulating layer over the working area of immunochips. The breakdown of the polymer layer was exemplified by the catalytic action of urease which, in the presence of urea, caused an alkaline pH change. This subsequently caused an increase of the double layer capacitance of the underlying electrode. Used in conjunction with a competitive immunoassay format, this allowed the ratio of initial to final electrode capacitance to be directly linked with the concentration of analyte, i.e. IgG. Responses to IgG could be detected at IgG concentration as low as $250\;ngmL^{-1}$ and showed good linearity up to IgG concentration as high as $20\;{\mu}gmL^{-1}$.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.27 no.6
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• pp.95-99
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• 2013

Furnace is currently the most important doping process using POCl3 in solar cell. However furnace need an expensive equipment cost and it has to purge a poisonous gas. Moreover, furnace typically difficult appling for selective emitters. In this study, we developed a new atmospheric pressure plasma source, in this procedure, we research the atmospheric pressure plasma doping that dopant is phosphoric acid($H_3PO_4$). Metal tube injected Ar gas was inputted 5 kV of a low frequency(scores of kHz) induced inverter, so plasma discharged at metal tube. We used the P type silicon wafer of solar cell. We regulated phosphoric acid($H_3PO_4$) concentration on 10% and plasma treatment time is 90 s, 150 s, we experiment that plasma current is 70 mA. We check the doping depth that 287 nm at 90 s and 621 nm at 150 s. We analysis and measurement the doping profile by using SIMS(Secondary Ion Mass Spectroscopy). We calculate and grasp the sheet resistance using conventional sheet resistance formula, so there are 240 Ohm/sq at 90 s and 212 Ohm/sq at 150 s. We analysis oxygen and nitrogen profile of concentration compared with furnace to check the doped defect of atmosphere.

• Korean Journal of Materials Research
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• v.15 no.9
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• pp.589-593
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• 2005

Nanoimprinting lithography (NIL) is known as a suitable technique for fabricating nano and micro structures of high definition. Hot embossing is one of NIL techniques and can imprint on thin films and bulk polymers. Key issues of hot embossing are time and expense needed to produce a stamp withstanding a high temperature and pressure. Fabrication of a metal stamp such as an electroplated nickel is cost intensive and time consuming. A ceramic stamp made by silicon is easy to break when the pressure is applied. In this paper, a plastic stamp using a high temperature epoxy was fabricated and tested. The plastic stamp was relatively inexpensive, rapid to produce and durable enough to withstanding multiple hot embossing cycles. The merits of low viscosity epoxy solutions were a fast degassing and a rapid filling the microstructures. The hot embossing process with plastic stamp was performed on PMMA substrates. The hot embossing was conducted at 12.6 bar, $120^{\circ}C$ and 10 minutes. An imprinted PMMA wafer was almost same value of the plastic stamp after 10 times embossing. Entire fabrication process from silicon master to plastic stamp was completed within 12 hours.