• 제목/요약/키워드: low-k wafer

검색결과 306건 처리시간 0.027초

반도체/LCD PR 제거용 EC의 재이용 기술에 관한 연구 (A Study on Recycling Technology of EC for Semiconductor and LCD PR Stripping Process)

  • 문세호;채상훈
    • 대한전자공학회논문지SD
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    • 제46권10호
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    • pp.25-30
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    • 2009
  • 오존을 이용하여 PR 박리에 사용된 에틸렌 카보네이트계 박리 세정제를 재이용할 수 있는 기술에 대하여 연구함으로써 향후 고성능-저가격의 반도체, LCD 제조에서의 PR 박리 및 세정 공정에 적용할 수 있는 핵심 공정기술을 확보하였다. 이 기술을 적용하면 반도체 웨이퍼 및 LCD 평판의 PR 박리 세정을 보다 빠르고 저렴한 비용으로 수행할 수 있으므로 반도체 및 LCD 제작공정의 생산성을 향상시킬 수 있다.

Field Oxide를 이용한 고전압 SiC 쇼트키 diode 제작 (Fabrication of SiC Schottky Diode with Field oxide structure)

  • 송근호;방욱;김상철;서길수;김남균;김은동;박훈수
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 하계학술대회 논문집
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    • pp.350-353
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    • 2002
  • High voltage SiC Schottky barrier diodes with field plate structure have been fabricated and characterized. N-type 4H-SiC wafer with an epilayer of ∼10$\^$15/㎤ doping level was used as a starting material. Various Schottky metals such as Ni, Pt, Ta, Ti were sputtered and thermally-evaporated on the low-doped epilayer. Ohmic contact was formed at the backside of the SiC wafer by annealing at 950$^{\circ}C$ for 90 sec in argon using rapid thermal annealer. Field oxide of 550${\AA}$ in thickness was formed by a wet oxidation process at l150$^{\circ}C$ for 3h and subsequently heat-treated at l150$^{\circ}C$ for 30 min in argon for improving oxide quality. The turn-on voltages of the Ni/4H-SiC Schottky diode was 1.6V which was much higher than those of Pt(1.0V), Ta(0.7V) and Ti(0.7). The voltage drop was measured at the current density of 100A/$\textrm{cm}^2$ showing 2.1V for Ni Schottky diode, 1.45V for Pt 1.35V, for Ta, and 1.25V for Ti, respectively. The maximum reverse breakdown voltage was measured 1100V in the file plated Schottky diodes with 101an thick epilayer.

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병렬처리 기반의 H.264/AVC 인코더를 위한 저 메모리 대역폭 움직임 예측 코어설계 (A Low Memory Bandwidth Motion Estimation Core for H.264/AVC Encoder Based on Parallel Current MB Processing)

  • 김시혜;최준림
    • 대한전자공학회논문지SD
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    • 제48권2호
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    • pp.28-34
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    • 2011
  • 본 논문에서는 H.264/AVC 인코더를 위한 하드웨어 지향 알고리즘의 정화소 및 부화소 움직임 예측 코어를 제안한다. 정화소 움직임 엔진의 경우 참조블록은 병렬 처리 내의 연속된 현재 블록들에 공유되어 데이터 재사용율을 높이고 오프칩 대역폭을 줄인다. 부화소 움직임 엔진의 경우 두 단계의 순차적 보간 신호 생성 대신 불필요한 후보 위치들 대신 1/2과 1/4 화소정밀도 신호를 병렬 기법으로 생성하여 처리량을 두배로 높인다. 또한 제안하는 H.264 움직임 예측 코어는 Chartered $0.18{\mu}m$ CMOS 1P5M 공정의 MPW(Multi-Project Wafer)를 통해 칩으로 제작되었으며 높은 처리량으로 HDTV 720p 30fps를 실시간 지원한다.

Invention of Ultralow - n SiO2 Thin Films

  • Dung, Mai Xuan;Lee, June-Key;Soun, Woo-Sik;Jeong, Hyun-Dam
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2010년도 제39회 하계학술대회 초록집
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    • pp.281-281
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    • 2010
  • Very low refractive index (<1.4) materials have been proved to be the key factor improving the performance of various optical components, such as reflectors, filters, photonic crystals, LEDs, and solar cell. Highly porous SiO2 are logically designed for ultralow refractive index materials because of the direct relation between porosity and index of refraction. Among them, ordered macroporous SiO2 is of potential material since their theoretically low refractive index ~1.10. However, in the conventional synthesis of ordered macroporous SiO2, the time required for the crystallization of organic nanoparticles, such as polystyrene (PS), from colloidal solution into well ordered template is typical long (several days for 1 cm substrate) due to the low interaction between particles and particle - substrate. In this study, polystyrene - polyacrylic acid (PS-AA) nanoparticles synthesized by miniemulsion polymerization method have hydrophilic polyacrylic acid tails on the surface of particles which increase the interaction between particle and with substrate giving rise to the formation of PS-AA film by simply spin - coating method. Less ordered with controlled thickness films of PS-AA on silicon wafer were successfully fabricated by changing the spinning speed or concentration of colloidal solution, as confirmed by FE-SEM. Based on these template films, a series of macroporous SiO2 films whose thicknesses varied from 300nm to ~1000nm were fabricated either by conventional sol - gel infiltration or gas phase deposition followed by thermal removal of organic template. Formations of SiO2 films consist of interconnected air balls with size ~100 nm were confirmed by FE-SEM and TEM. These highly porous SiO2 show very low refractive indices (<1.18) over a wide range of wavelength (from 200 to 1000nm) as shown by SE measurement. Refraction indices of SiO2 films at 633nm reported here are of ~1.10 which, to our best knowledge, are among the lowest values having been announced.

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Ti (10 nm)-buffered 기판들 위에 저온에서 직접 성장된 무 전사, 대 면적, 고 품질 단층 그래핀 특성 (Transfer-Free, Large-Scale, High-Quality Monolayer Graphene Grown Directly onto the Ti (10 nm)-buffered Substrates at Low Temperatures)

  • 한이레;박병주;엄지호;윤순길
    • 한국재료학회지
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    • 제30권3호
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    • pp.142-148
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    • 2020
  • Graphene has attracted the interest of many researchers due to various its advantages such as high mobility, high transparency, and strong mechanical strength. However, large-area graphene is grown at high temperatures of about 1,000 ℃ and must be transferred to various substrates for various applications. As a result, transferred graphene shows many defects such as wrinkles/ripples and cracks that happen during the transfer process. In this study, we address transfer-free, large-scale, and high-quality monolayer graphene. Monolayer graphene was grown at low temperatures on Ti (10nm)-buffered Si (001) and PET substrates via plasma-assisted thermal chemical vapor deposition (PATCVD). The graphene area is small at low mTorr range of operating pressure, while 4 × 4 ㎠ scale graphene is grown at high working pressures from 1.5 to 1.8 Torr. Four-inch wafer scale graphene growth is achieved at growth conditions of 1.8 Torr working pressure and 150 ℃ growth temperature. The monolayer graphene that is grown directly on the Ti-buffer layer reveals a transparency of 97.4 % at a wavelength of 550 nm, a carrier mobility of about 7,000 ㎠/V×s, and a sheet resistance of 98 W/□. Transfer-free, large-scale, high-quality monolayer graphene can be applied to flexible and stretchable electronic devices.

40채널 SQUID 시스템의 설계 (Design of a 40 channel SQUID system)

  • 이용호;김진목;권혁찬;임청무;이상길;박용기;박종철;이동훈;신진교;안창범;박민석;허용;흥종배
    • 대한의용생체공학회:학술대회논문집
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    • 대한의용생체공학회 1998년도 추계학술대회
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    • pp.191-192
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    • 1998
  • We report on the design of a low-noise 40 channel SQUID system for biomagnetism. We used low-noise SQUID sensor with the pickup coil integrated on the same wafer as the SQUID. The SQUID electronics were simplified by increasing the voltage output of the SQUID. The SQUID insert was designed to have low thermal load, minimizing the liquid helium loss. The digital signal processing provides versatile analysis tools and the software is based on the object-oriented programming. For the effective localization of the source location, solutions of the inverse problems based on the lead-field and the simulated anneal ins were studied.

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Metamorphic HEMT에서 low-k Benzocyclobutene(BCB)를 이용한 표면 passivation 비교 연구 (Comparative Study of surface passivation for Metamorphic HEMT using low-k Benzocyclobutene(BCB))

  • 백용현;오정훈;한민;최석규;이복형;이성대;이진구
    • 대한전자공학회논문지SD
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    • 제44권4호
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    • pp.80-85
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    • 2007
  • Passivation 기술은 소자를 외부 환경의 영향으로부터 보호할 수 있고, 소자 성능의 감소를 예방할 수 있기 때문에 능동 소자 제작에 있어서 매우 중요하다. 본 논문에서 passivation 물질로 낮은 유전 상수를 갖는 benzocyclobutene (BCB)과 전통적인 passivation 물질인 Si3N4를 이용하여 GaAs를 기반으로 하는 $0.1{\mu}m\;{\Gamma}$-gate InAlAs/InGaAs metamorphic high electron mobility transistors (MHEMTs)를 제작하였다. 제작된 MHEMT의 특성은 passivation 전과 후로 구분하여 비교하였다. Passivation후 BCB와 Si3N4를 이용한 경우 모두에서 passivation 이전에 비해 저하된 DC 및 RF 특성을 나타내었으나, BCB를 이용하여 passivation을 한 소자들이 전통적인 passivation 물질인 Si3N4를 이용한 소자들에 비해서 상대적으로 낮은 특성 저하를 DC와 RF에서 함께 나타내었다.

p-$Hg_{0.7}$$Cd_{0.3}$Te에 낮은 저항의 접촉을 얻는 방법에 대한 연구 (Low-resistance ohmic contacts to p-$Hg_{0.7}$$Cd_{0.3}$Te)

  • 김관;정한;김성철;이희철;김충기;김홍국;김재묵
    • 전자공학회논문지A
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    • 제31A권10호
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    • pp.87-93
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    • 1994
  • Ohmic contacts between Au and p-HgHg_{0.7}Cd_{0.3}Te$ with low specific contact resistance have been obtained. The contact region of the wafer is first pre-heated for 5 seconds in a rapid thermal processing equipment. The temperature reaches a maximum value of about 200$^{\circ}C$ at the end of the 5 seconds. Next, a thin Au film is formed on the contact region by immersing the sample in AuCl$_{3}$ solution. the sample is then post-annealed in the same condition as the pre-heating after Pb/In pad metals are deposited on the electroless Au contacts. The specific contact resistance measured by transmission line model is 5${\times}10^{-3}{\Omega}cm^{2}$ at 80K. RBS and differential Hall measurement data suggest that the above low resistance ohmic contact is ascribed to surface traps and increased gold diffusion rate.

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집속 이온빔을 이용한 투과 전자 현미경 시편의 표면 영향에 관한 연구 (Study on Surface Damage of Specimen for Transmission Electron Microscopy(TEM) Using Focused Ion Beam(FIB))

  • 김동식
    • 전자공학회논문지 IE
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    • 제47권2호
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    • pp.8-12
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    • 2010
  • TEM(Transmission Electrion microsopy) 투과전자현미경은 재료의 기초 구조 분석과 반도체 또는 생물시편의 미세 구조분석에 널리 사용되는 장비이다. TEM 분석은 필수적으로 목적에 부합되는 적절한 시편제작이 수반되어야 한다. 다양한 전자 현미경 시편 제작 방법 중 본 논문에서는 FIB(Focus Ion Beam)를 이용한 시편 제작법 중 시편에 입사되는 에너지와 이온 Gun과 시편과의 상호 각도, 이온 밀링 깊이 조절 등의 실험을 통하여 표면 손상 최소화를 벌크 웨이퍼와 패턴화된 시편에서 실험하였다. 최소화된 표면 영향성(약 5nm)을 패턴화된 시편에 구현하였다.

The Substrate Effects on Kinetics and Mechanism of Solid-Phase Crystallization of Amorphous Silicon Thin Films

  • Song, Yoon-Ho;Kang, Seung-Youl;Cho, Kyoung-Ik;Yoo, Hyung-Joun
    • ETRI Journal
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    • 제19권1호
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    • pp.26-35
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    • 1997
  • The substrate effects on solid-phase crystallization of amorphous silicon (a-Si) films deposited by low-pressure chemical vapor deposition (LPCVD) using $Si_2H_6$ gas have been extensively investigated. The a-Si films were prepared on various substrates, such as thermally oxidized Si wafer ($SiO_2$/Si), quartz and LPCVD-oxide, and annealed at 600$^{\circ}C$ in an $N_2$ ambient for crystallization. The crystallization behavior was found to be strongly dependent on the substrate even though all the silicon films were deposited in amorphous phase. It was first observed that crystallization in a-Si films deposited on the $SiO_2$/Si starts from the interface between the a-Si and the substrate, so called interface-interface-induced crystallization, while random nucleation process dominates on the other substrates. The different kinetics and mechanism of solid-phase crystallization is attributed to the structural disorderness of a-Si films, which is strongly affected by the surface roughness of the substrates.

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