• 제목/요약/키워드: low-density parity check code

검색결과 124건 처리시간 0.034초

Construction of Structured q-ary LDPC Codes over Small Fields Using Sliding-Window Method

  • Chen, Haiqiang;Liu, Yunyi;Qin, Tuanfa;Yao, Haitao;Tang, Qiuling
    • Journal of Communications and Networks
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    • 제16권5호
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    • pp.479-484
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    • 2014
  • In this paper, we consider the construction of cyclic and quasi-cyclic structured q-ary low-density parity-check (LDPC) codes over a designated small field. The construction is performed with a pre-defined sliding-window, which actually executes the regular mapping from original field to the targeted field under certain parameters. Compared to the original codes, the new constructed codes can provide better flexibility in choice of code rate, code length and size of field. The constructed codes over small fields with code length from tenths to hundreds perform well with q-ary sum-product decoding algorithm (QSPA) over the additive white Gaussian noise channel and are comparable to the improved spherepacking bound. These codes may found applications in wireless sensor networks (WSN), where the delay and energy are extremely constrained.

Analysis of error correction capability and recording density of an optical disc system with LDPC code (LDPC 코드를 적용한 광 디스크 시스템의 에러 정정 성능 및 기록 용량 분석)

  • 김기현;김현정;이윤우
    • Proceedings of the IEEK Conference
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    • 대한전자공학회 2003년도 신호처리소사이어티 추계학술대회 논문집
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    • pp.537-540
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    • 2003
  • In this paper, we evaluated error correction performance and recording density of an optical disc system. The performance of Low-Density Parity Check code (LDPC) is compared to the HD-DVD (BD) ECC. The recording density of optical disc can be increased by reducing the redundancy of the user data. Moreover, since the correction capability of LDPC with decreased redundancy is better than that of BD, the recording density can also be increased by reducing the mark length of the data on the disc surface.

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Design and Performance Evaluation of Improved Turbo Equalizer (개선된 터보 등화기의 설계와 성능 평가)

  • An, Changyoung;Ryu, Heung-Gyoon
    • Journal of the Institute of Electronics and Information Engineers
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    • 제50권8호
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    • pp.28-38
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    • 2013
  • In this paper, we propose a improved turbo equalizer which generates a feedback signal through a simple calculation to improve performance in single carrier system with the LMS(least mean square) algorithm based equalizer and LDPC(low density parity check) codes. LDPC codes can approach the Shannon limit performance closely. However, computational complexity of LDPC codes is greatly increased by increasing the repetition of the LDPC codes and using a long parity check matrix in harsh environments. Turbo equalization based on LDPC code is used for improvement of system performance. In this system, there is a disadvantage of very large amount of computation due to the increase of the repetition number. To less down the amount of this complicated calculation, The proposed improved turbo equalizer adjusts the adoptive equalizer after the soft decision and the LDPC code. Through the simulation results, it's confirmed that performance of improved turbo equalizer is close to the SISO-MMSE(soft input soft output minimum mean square error) turbo equalizer based on LDPC code with the smaller amount of calculation.

LDPC Generation and Decoding concatenated to Viterbi Decoder based on Sytematic Convolutional Encoder (길쌈부호기를 이용한 LDPC 패리티검사 행렬생성 및 비터비 복호 연계 LDPC 복호기)

  • Lee, Jongsu;Hwang, Eunhan;Song, Sangseob
    • Smart Media Journal
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    • 제2권2호
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    • pp.39-43
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    • 2013
  • In this paper, we suggest a new technique for WPC parity-check matrix (H-matrix) generation and a corresponding decoding process. The key idea is to construct WPC H-matrix by using a convolutional encoder. It is easy to have many different coderates from a mother code with convolutional codes. However, it is difficult to have many different coderates with LDPC codes. Constructing LDPC Hmatrix based on a convolutional code can easily bring the advantage of convolutional codes to have different coderates. Moreover, both LDPC and convolutional decoding algorithms can be applied altogether in the decoding part. This process prevents the performance degradation of short-length WPC code.

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Novel Class of Entanglement-Assisted Quantum Codes with Minimal Ebits

  • Dong, Cao;Yaoliang, Song
    • Journal of Communications and Networks
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    • 제15권2호
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    • pp.217-221
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    • 2013
  • Quantum low-density parity-check (LDPC) codes based on the Calderbank-Shor-Steane construction have low encoding and decoding complexity. The sum-product algorithm(SPA) can be used to decode quantum LDPC codes; however, the decoding performance may be significantly decreased by the many four-cycles required by this type of quantum codes. All four-cycles can be eliminated using the entanglement-assisted formalism with maximally entangled states (ebits). The proposed entanglement-assisted quantum error-correcting code based on Euclidean geometry outperform differently structured quantum codes. However, the large number of ebits required to construct the entanglement-assisted formalism is a substantial obstacle to practical application. In this paper, we propose a novel class of entanglement-assisted quantum LDPC codes constructed using classical Euclidean geometry LDPC codes. Notably, the new codes require one copy of the ebit. Furthermore, we propose a construction scheme for a corresponding zigzag matrix and show that the algebraic structure of the codes could easily be expanded. A large class of quantum codes with various code lengths and code rates can be constructed. Our methods significantly improve the possibility of practical implementation of quantum error-correcting codes. Simulation results show that the entanglement-assisted quantum LDPC codes described in this study perform very well over a depolarizing channel with iterative decoding based on the SPA and that these codes outperform other quantum codes based on Euclidean geometries.

An Efficient Overlapped LDPC Decoder with a Upper Dual-diagonal Structure

  • Byun, Yong Ki;Park, Jong Kang;Kwon, Soongyu;Kim, Jong Tae
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제13권1호
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    • pp.8-14
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    • 2013
  • A low density parity check (LDPC) decoder provides a most powerful error control capability for mobile communication devices and storage systems, due to its performance being close to Shannon's limit. In this paper, we introduce an efficient overlapped LDPC decoding algorithm using a upper dual-diagonal parity check matrix structure. By means of this algorithm, the LDPC decoder can concurrently execute parts of the check node update and variable node update in the sum-product algorithm. In this way, we can reduce the number of clock cycles per iteration as well as reduce the total latency. The proposed decoding structure offers a very simple control and is very flexible in terms of the variable bit length and variable code rate. The experiment results show that the proposed decoder can complete the decoding of codewords within 70% of the number of clock cycles required for a conventional non-overlapped decoder. The proposed design also reduces the power consumption by 33% when compared to the non-overlapped design.

Analysis a LDPC code in the VDSL system (VDSL 시스템에서의 LDPC 코드 연구)

  • Joh, Kyung-Hyun;Kang, Hee-Hoon;Yi, Sang-Hoi;Na, Kuk-Hwan
    • Proceedings of the IEEK Conference
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    • 대한전자공학회 2006년도 하계종합학술대회
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    • pp.999-1000
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    • 2006
  • The LDPC Code is focusing a powerful FEC(Forward Error Correction) codes for 4G Mobile Communication system. LDPC codes are used minimizing channel errors by modeling AWGN Channel as VDSL system. The performance of LDPC code is better than that of turbo code in long code word on iterative decoding algorithm. LDPC code are encoded by sparse parity check matrix. there are decoding algorithms for a LDPC code, Bit Flipping, Message passing, Sum-Product. Because LDPC Codes use low density parity bit, mathematical complexity is low and relating processing time becomes shorten.

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A performance analysis of LDPC decoder for IEEE 802.16e WiMAX System (IEEE 802.16e WiMAX용 LDPC 복호기의 성능분석)

  • Kim, Eun-Suk;Kim, Hae-Ju;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 한국해양정보통신학회 2010년도 추계학술대회
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    • pp.722-725
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    • 2010
  • In this paper, BER performance and error convergence speed of layered LDPC(Low Density Parity Check) decoder which supports IEEE 802.16e WiMAX standard is analyzed, and optimal design conditions for hardware implementation are derived. A LDPC decoder is modeled and simulated at AWGN channel with QPSK modulation by Matlab. The parity check matrix(PCM) for IEEE 802.16e standard which has block lengths of 576, 1440, 2304 and code rates of 1/2, 2/3A, 2/3B, 3/4A, 3/4B, 5/6 are used. Fixed-point simulation results show that fixed-point bit-width should be more than 8 bits for acceptable decoding performance.

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New Decoding Scheme for LDPC Codes Based on Simple Product Code Structure

  • Shin, Beomkyu;Hong, Seokbeom;Park, Hosung;No, Jong-Seon;Shin, Dong-Joon
    • Journal of Communications and Networks
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    • 제17권4호
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    • pp.351-361
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    • 2015
  • In this paper, a new decoding scheme is proposed to improve the error correcting performance of low-density parity-check (LDPC) codes in high signal-to-noise ratio (SNR) region by using post-processing. It behaves as follows: First, a conventional LDPC decoding is applied to received LDPC codewords one by one. Then, we count the number of word errors in a predetermined number of decoded codewords. If there is no word error, nothing needs to be done and we can move to the next group of codewords with no delay. Otherwise, we perform a proper post-processing which produces a new soft-valued codeword (this will be fully explained in the main body of this paper) and then apply the conventional LDPC decoding to it again to recover the unsuccessfully decoded codewords. For the proposed decoding scheme, we adopt a simple product code structure which contains LDPC codes and simple algebraic codes as its horizontal and vertical codes, respectively. The decoding capability of the proposed decoding scheme is defined and analyzed using the parity-check matrices of vertical codes and, especially, the combined-decodability is derived for the case of single parity-check (SPC) codes and Hamming codes used as vertical codes. It is also shown that the proposed decoding scheme achieves much better error correcting capability in high SNR region with little additional decoding complexity, compared with the conventional LDPC decoding scheme.

An analysis of BER performance of LDPC decoder for WiMAX (WiMAX용 LDPC 복호기의 비트오율 성능 분석)

  • Kim, Hae-Ju;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 한국해양정보통신학회 2010년도 춘계학술대회
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    • pp.771-774
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    • 2010
  • In this paper, BER performance of LDPC(Low-Density Parity-Check) decoder for WiMAX is analyzed, and optimal design conditions of LDPC decoder are derived. The min-sum LDPC decoding algorithm which is based on an approximation of LLR sum-product algorithm is modeled and simulated by Matlab, and it is analyzed that the effects of LLR approximation bit-width and maximum iteration cycles on the bit error rate(BER) performance of LDCP decoder. The parity check matrix for IEEE 802.16e standard which has block length of 2304 and code rate of 1/2 is used, and AWGN channel with QPSK modulation is assumed. The simulation results show that optimal BER performance is achieved for 7 iteration cycles and LLR bit-width of (8,6).

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