• 제목/요약/키워드: low power system

검색결과 5,550건 처리시간 0.029초

Embedded 기술을 이용한 COS MEMS 시스템 설계 (COS MEMS System Design with Embedded Technology)

  • Hong, Seon Hack;Lee, Seong June;Park, Hyo Jun
    • KEPCO Journal on Electric Power and Energy
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    • 제6권4호
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    • pp.405-411
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    • 2020
  • In this paper, we designed the COS MEMS system for sensing the falling detection and explosive noise of fuse link in COS (Cut Out Switch) installing on the power distribution. This system analyzed the failure characteristics and an instantaneous breakdown of power distribution. Therefore, our system strengths the industrial competence and guaranties the stable power supply. In this paper, we applied BLE (Bluetooth Low Energy) technology which is suitable protocol for low data rate, low power consumption and low-cost sensor applications. We experimented with LSM6DSOX which is system-in-module featuring 3 axis digital accelerometer and gyroscope boosting in high-performance mode and enabling always-on low-power features for an optimal motion for the COS fuse holder. Also, we used the MP34DT05-A for gathering an ultra-compact, low power, omnidirectional, digital MEMS microphone built with a capacitive sensing element and an IC interface. The proposed COS MEMS system is developed based on nRF52 SoC (System on Chip), and contained a 3-axis digital accelerometer, a digital microphone, and a SD card. In this paper of experiment steps, we analyzed the performance of COS MEMS system with gathering the accelerometer raw data and the PDM (Pulse Data Modulation) data of MEMS microphone for broadcasting the failure of COS status.

Application of Low Voltage High Resistance Grounding in Nuclear Power Plants

  • Chang, Choong-Koo;Hassan, Mostafa Ahmed Fouad
    • Nuclear Engineering and Technology
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    • 제48권1호
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    • pp.211-217
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    • 2016
  • Most nuclear power plants now utilize solid grounded low voltage systems. For safety and reliability reasons, the low voltage (LV) high resistance grounding (HRG) system is also increasingly used in the pulp and paper, petroleum and chemical, and semiconductor industries. Fault detection is easiest and fastest with a solidly grounded system. However, a solidly grounded system has many limitations such as severe fault damage, poor reliability on essential circuits, and electrical noise caused by the high magnitude of ground fault currents. This paper will briefly address the strengths and weaknesses of LV grounding systems. An example of a low voltage HRG system in the LV system of a nuclear power plant will be presented. The HRG system is highly recommended for LV systems of nuclear power plants if sufficient considerations are provided to prevent nuisance tripping of ground fault relays and to avoid the deterioration of system reliability.

저압모의계통 구성을 통한 고저항지락사고 검출용 계전기의 실계통 적응성 검증 (Verification of Hi9h Impedance Fault Relay through Low Voltage Power System Implementation)

  • 홍순천;장병태;유홍준
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1999년도 하계학술대회 논문집 C
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    • pp.1437-1439
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    • 1999
  • This paper describes test method though low voltage power system implementation for high impedance fault relay test before its operation in real power system. Through this test, relay tested its function and algorithm. In this paper, we will provides test method using low voltage power system and its results.

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제한된 전원을 사용하는 저전력 시스템 설계 (Design of the low-power system using the limited source)

  • 김도훈;이교성;김용상;박종철;김양모
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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    • pp.163-165
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    • 2003
  • Over the past several years, the application extent of the real-time systems is being expanded with the progress of civilization. An effort to minimize power consumption at the system is being accomplished in several fields from the design of an analog/digital circuit up to the device level Things of this effort have included the power optimum-technique to minimize power consumption at the digital logic circuit and the dynamic managed skill by means o( the decision of the operating system. In this paper, we designed of low power system by using Power-optimized method. As an effective low-power design, we designed the low power system which it has a monitoring system within the main board and a personal computer.

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저전력 네트워크 기반의 확장 용이한 스마트 홈 IoT 시스템 (An Extensible Smart Home IoT System Based on Low-power Networks)

  • 이준영;유성은
    • 대한임베디드공학회논문지
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    • 제13권3호
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    • pp.133-141
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    • 2018
  • There are increasing interests on smart home systems. However, most of the existing works focus on the functionality itself. In this paper, we propose an extensible smart home system based on low power networking such as CoAP, 6LoWPAN, and Zigbee. The proposed home IoT system consists of Home APP, Home Server, Home Broker, and Power Devices. Each component of the system is connected by the low-power network technologies aforementioned. As the end device, Power Device senses the current consumption of the attached appliance and controls the power to it. Power Device reports the sensing data to Home Server via Home Broker. The Home Broker enhances the scalability of the system. Home Broker extends the service area and the user's services, and it manages the connection of the underlying devices and processes, and transmits data to Home Server from Power Devices. Through the experimental evaluation, we show that the proposed system achieves the design goals such as extensibility and low power networking.

Low-Power Bus Architecture Composition for AMBA AXI

  • Na, Sang-Kwon;Yang, Sung;Kyung, Chong-Min
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제9권2호
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    • pp.75-79
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    • 2009
  • A system-on-a-chip communication architecture has a significant impact on the performance and power consumption of modern multi-processors system-on-chips (MPSoCs). However, customization of such architecture for a specific application requires the exploration of a large design space. Thus, system designers need tools to rapidly explore and evaluate communication architectures. In this paper we present the method for application-specific low-power bus architecture synthesis at system-level. Our paper has two contributions. First, we build a bus power model of AMBA AXI bus communication architecture. Second, we incorporate this power model into a low-power architecture exploration algorithm that enables system designers to rapidly explore the target bus architecture. The proposed exploration algorithm reduces power consumption by 20.1% compared to a maximally connected reduced matrix, and the area is also reduced by 20.2% compared to the maximally connected reduced matrix.

저전력 모바일 멀티미디어 시스템 구조 설계에 관한 연구 (A design of a low power mobile multimedia system architecture)

  • 이은서;이재식;김병일;장태규
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 학술대회 논문집 정보 및 제어부문
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    • pp.231-233
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    • 2005
  • For the low-power design of the mobile multimedia system architecture, this paper modeling the mobile multimedia system and analysis the power consumption profile about the whole communication environment. The mobile system model consist of air interface, RIP front-end, base-band processing module and human interface. For the result of power consumption profile analysis, the power consumption of multimedia processing is above 60% compare to the whole power consumption in mobile multimedia system. To minimize the power consumption in processing module which consumes the large power, this paper proposed the Microscopic DVS technique which applies the optimum voltage for the each multimedia frame. For the simulation result, proposed power minimization technique reduce the power consumption about 30%.

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A Noncoherent UWB Communication System for Low Power Applications

  • Yang, Suck-Chel;Park, Jung-Wan;Moon, Yong;Lee, Won-Cheol;Shin, Yo-An
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제4권3호
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    • pp.210-216
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    • 2004
  • In this paper, we propose a noncoherent On-Off Keying (OOK) Ultra Wide Band (UWB) system based on power detection with noise power calibration for low power applications. The proposed UWB system achieves good bit error rate performance which is favorably comparable to that of the system using the ideal adaptive threshold, while maintaining simple receiver structure, In addition, low power Analog Front-End (AFE) blocks for the proposed noncoherent UWB transceiver are proposed and verified using CMOS technology. Simulation results on the pulse generator, delay time generator and 1-bit Analog-to-Digital (AID) converter show feasibility of the proposed UWB AFE system.

Low power scan testing and efficient test data compression for System-On-a-Chip

  • Jung, Jun-Mo;Chong, Jong-Wha
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 ITC-CSCC -1
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    • pp.228-230
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    • 2002
  • We present a new low power scan testing and test data compression method for System-On-a-Chip (SOC). The don't cares in unspecified scan vectors are mapped to binary values for low power and encoded by adaptive encoding method for higher compression. Also, the scan-in direction of scan vectors is determined for low power. Experimental results for full-scanned versions of ISCAS 89 benchmark circuits show that the proposed method has both low power and higher compression.

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The Software Algorithm Design a Suitable Ultra-Low Power RF System

  • Kim, Jung-won;Choi, Ung-Se
    • 전기전자학회논문지
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    • 제12권1호
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    • pp.27-33
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    • 2008
  • The demand of wireless communication is increased rapidly due to the development of wireless communication systems, and many people have the great interest about the "RF system". The trend of the RF audio system is to design the system with less power consumption. In this paper, we explain the Software Algorithm Design of RF systems that is suitable for low power consumption.

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