Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2002.07a
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- Pages.228-230
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- 2002
Low power scan testing and efficient test data compression for System-On-a-Chip
- Jung, Jun-Mo (CAD & Communication Circuit Lab.) ;
- Chong, Jong-Wha (Dept. of Electronic Engineering, Hanyang University)
- Published : 2002.07.01
Abstract
We present a new low power scan testing and test data compression method for System-On-a-Chip (SOC). The don't cares in unspecified scan vectors are mapped to binary values for low power and encoded by adaptive encoding method for higher compression. Also, the scan-in direction of scan vectors is determined for low power. Experimental results for full-scanned versions of ISCAS 89 benchmark circuits show that the proposed method has both low power and higher compression.
Keywords