• The Transactions of the Korean Institute of Electrical Engineers P
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• v.63 no.4
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• pp.290-294
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• 2014

PID(Proportional, Integral, Derivative) controller is the most popular process controllers in nuclear power plants. The optimized parameter setting of the process controller contributes to the stable operation and the efficiency of the operating nuclear power plants. PID parameter setting is tuned when new process control systems are installed or current process control systems are changed. When the nuclear plant is shut down, a lot of PID tuning methods such as the Trial and Error method, Ultimate Oscillation method operation, Ziegler-Nichols method, frequency method are used to tune the PID values. But inadequate PID parameter setting can be the cause of the unstable process of the operating nuclear power plant. Therefore the results of PID parameter setting should be simulated, optimized and finally verified. This paper introduces the simulation method of PID tuning to optimize the PID parameter setting and confirms them of the actual PID controller in the operating nuclear power plants. The simulation method provides the accurate process modeling and optimized PID parameter setting of the multi-loop control process in particular.

• Journal of Power Electronics
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• v.16 no.3
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• pp.1226-1235
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• 2016

For wearable health monitoring systems, a fundamental problem is the limited space for storing energy, which can be translated into a short operational life. In this paper, a highly efficient active voltage doubling rectifier with a wide input range for micro-piezoelectric energy harvesting systems is proposed. To obtain a higher output voltage, the Dickson charge pump topology is chosen in this design. By replacing the passive diodes with unbalanced-biased comparator-controlled active counterparts, the proposed rectifier minimizes the voltage losses along the conduction path and solves the reverse leakage problem caused by conventional comparator-controlled active diodes. To improve the rectifier input voltage sensitivity and decrease the minimum operational input voltage, two low power common-gate comparators are introduced in the proposed design. To keep the comparator from oscillating, a positive feedback loop formed by the capacitor C is added to it. Based on the SMIC 0.18-μm standard CMOS process, the proposed rectifier is simulated and implemented. The area of the whole chip is 0.91×0.97 mm², while the rectifier core occupies only 13% of this area. The measured results show that the proposed rectifier can operate properly with input amplitudes ranging from 0.2 to 1.0V and with frequencies ranging from 20 to 3000 Hz. The proposed rectifier can achieve a 92.5% power conversion efficiency (PCE) with input amplitudes equal to 0.6 V at 200 Hz. The voltage conversion efficiency (VCE) is around 93% for input amplitudes greater than 0.3 V and load resistances larger than 20kΩ.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.6
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• pp.517-525
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• 2015

A grid connected inverter must be operated as the main electricity source under an isolated condition caused by the grid problem. Conventionally, the dual loop controller is used for the grid inverter, and the controller is used for control under the stand-alone mode. Generally, the PI(Proportional - Integral) controller is highly efficient under a synchronous reference frame, and stable control can be available. However, in this synchronous frame-based control, high-quality DSP is required because many sinusoidal calculations are necessary. When the PI control is conducted under a stationary frame, the controller constructions are made simple so that they work even with a low-price micro controller. However, given the characteristics of the PI controller, it should be designed with the phase of reference voltage considered. Otherwise, the phase delay of the output voltage can occur. Although the current controller also has a higher bandwidth than the voltage controller, distortion of the voltage is difficult to avoid only by the rapid response of the PI controller, as a sudden load change can occur in the nonlinear load. In this study, a new control method that solves the voltage controller bandwidth problem and rapidly copes with it even in the nonlinear load situation is proposed. The validity of the proposed method is proved by simulation and experimental results.

• Journal of the Korea Society of Computer and Information
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• v.19 no.6
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• pp.19-26
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• 2014

An ensemble classifier system is a widely-used multi-classifier system, which combines the results from each classifier and, as a result, achieves better classification result than any single classifier used. Several methods have been used to build an ensemble classifier including boosting, which is a cascade method where misclassified examples in previous stage are used to boost the performance in current stage. Boosting is, however, a serial method which does not form a complete feedback loop. In this paper, proposed is context sensitive SVM ensemble (CASE) which adopts SVM, one of the best classifiers in term of classification rate, as a basic classifier and clustering method to divide feature space into contexts. As CASE divides feature space and trains SVMs simultaneously, the result from one component can be applied to the other and CASE achieves better result than boosting. Experimental results prove the usefulness of the proposed method.

• Journal of the Korean Magnetics Society
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• v.5 no.4
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• pp.304-308
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• 1995

In order to measure magnetic field difference, we have constructed a fluxgate magnetometer which is based on the measurement of apparent coreci ve field strength from the magnetizing current of two sensors. 'Co-based amorphous ribbon, which has square shape of ac hysteresis loop, was used as core material. Two sensors have 315 turns of the primary and the secondary windings respectively, and core size of 2 mm wide and 30 mm long. The primary windings are connected parallel to measure external magnetic field difference and the secondary windings serieally for the averaged magnetic induction of the cores. The constructed magnetometer could measure magnetic field difference with sensitivity of $1.6{\times}10^{6}V/T$ and resolution of 1 nT at 1 Hz bandwidth.

• Journal of Power Electronics
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• v.14 no.3
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• pp.444-457
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• 2014

This paper presents the design and realization of a digital PV simulator with a Push-Pull Forward (PPF) circuit based on the principle of modular hardware and configurable software. A PPF circuit is chosen as the main circuit to restrain the magnetic biasing of the core for a DC-DC converter and to reduce the spike of the turn-off voltage across every switch. Control and I/O interface based on a personal computer (PC) and multifunction data acquisition card, can conveniently achieve the data acquisition and configuration of the control algorithm and interface due to the abundant software resources of computers. In addition, the control program developed in Matlab/Simulink can conveniently construct and adjust both the models and parameters. It can also run in real-time under the external mode of Simulink by loading the modules of the Real-Time Windows Target. The mathematic models of the Push-Pull Forward circuit and the digital PV simulator are established in this paper by the state-space averaging method. The pole-zero cancellation technique is employed and then its controller parameters are systematically designed based on the performance analysis of the root loci of the closed current loop with $k_i$ and $R_L$ as variables. A fuzzy PI controller based on the Takagi-Sugeno fuzzy model is applied to regulate the controller parameters self-adaptively according to the change of $R_L$ and the operating point of the PV simulator to match the controller parameters with $R_L$. The stationary and dynamic performances of the PV simulator are tested by experiments, and the experimental results show that the PV simulator has the merits of a wide effective working range, high steady-state accuracy and good dynamic performances.

• Journal of the Korean Institute of Intelligent Systems
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• v.10 no.5
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• pp.409-416
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• 2000

In the shared-memory mutiprocessor systems, shared processing techniques such as time-sharing, space¬sharing, and gang-scheduling are used to improve the overall system utilization for the parallel operations. Recently, LLPC(Loop-Level Process Control) allocation technique was proposed. It dynamically adjusts the needed number of processors for the execution of the parallel code portions based on the current system load in the given job. This method allocates as many available processors as possible, and does not save any processors for the parallel sections of other later-arriving applications. To solve this problem, in this paper, we propose a new processor allocation technique called FPA(Fuzzy Processor Allocation) that dynamically adjusts the number of processors by fuzzifYing the amounts ofueeded number of processors, loads, and estimated execution times of job. The proposed method provides the maximum possibility of the parallism of each job without system overload. We compare the performances of our approaches with the conventional results. The experiments show that the proposed method provides a better performance.

• Journal of Satellite, Information and Communications
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• v.7 no.1
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• pp.128-133
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• 2012

In this paper, we analysis the effect of error of code tracking and frequency tracking according to the chip delay of spoofing signal through the simulation. Firstly, we investigate the type of spoofing signal and defense technical of spoofing attack. For simulation, we generated the intermediate spoofing signal using the software GNSS signal generator simulator(SGGS), the intermediate spoofers synchronize its counterfeit GPS signals with the current broadcast GPS signals. The software GPS receiver simulator(SGRS) received the spoofing signal and normal signal from SGGS, and process the signals. In paper, we can check that the DLL and PLL tracking loop error are generated and pseudo-range is changed non-linear according to chip delay of spoofing signal when the spoofing signal is entered. As a result, we can check that navigation solution is incorrectly effected by spoofing signal.

• The KIPS Transactions:PartC
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• v.9C no.2
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• pp.149-156
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• 2002

Current vaccine program which scans virus code patterns has a difficult to detect the encrypted viruses or polymorphic viruses. The decryption part of polymorphic virus appears to be different every time it replicates. We must monitor the behavior of the decryption code which decrypts the body of the virus in order to detect these kinds of viruses. Specialty, it is not easy for the existing methods to detect the virus if the virus writer has modified the loop count of execution intentionally. In this paper, we propose an advanced emulator using a new algorithm so as to detect various kinds of polymorphic viruses. As a result of experiment using advanced emulator, we found that our proposed method has improved the virus detecting rate about 2%. In addition, our proposed system has a merit that it runs on not only MS-Windows but also Linux, and Unix-like Platform.

• Journal of Power Electronics
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• v.11 no.3
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• pp.360-368
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• 2011

This paper proposes an active frequency with a positive feedback in the d-q frame anti-islanding method suitable for a robust phase-locked loop (PLL) algorithm using the FFT concept. In general, PLL algorithms for grid-connected PV PCS use d-q transformation and controllers to make zero an imaginary part of the transformed voltage vector. In a real grid system, the grid voltage is not ideal. It may be unbalanced, noisy and have many harmonics. For these reasons, the d-q transformed components do not have a pure DC component. The controller tuning of a PLL algorithm is difficult. The proposed PLL algorithm using the FFT concept can use the strong noise cancelation characteristics of a FFT algorithm without a PI controller. Therefore, the proposed PLL algorithm has no gain-tuning of a PI controller, and it is hardly influenced by voltage drops, phase step changes and harmonics. Islanding prediction is a necessary feature of inverter-based photovoltaic (PV) systems in order to meet the stringent standard requirements for interconnection with an electrical grid. Both passive and active anti-islanding methods exist. Typically, active methods modify a given parameter, which also affects the shape and quality of the grid injected current. In this paper, the active anti-islanding algorithm for a grid-connected PV PCS uses positive feedback control in the d-q frame. The proposed PLL and anti-islanding algorithm are implemented for a 250kW PV PCS. This system has four DC/DC converters each with a 25kW power rating. This is only one-third of the total system power. The experimental results show that the proposed PLL, anti-islanding method and topology demonstrate good performance in a 250kW PV PCS.