• Journal of Broadcast Engineering
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• v.13 no.2
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• pp.222-235
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• 2008

Recently, as growing of high definition media services like HDTV and IPTV, fast moving picture manipulation techniques need to meet what those services require. Especially, a fast reduced-size image extracting method is required in the areas of video indexing and video summary Conventional DC image extracting methods, however, can't be applied to H.264/AVC streams since a spatial domain prediction scheme is adopted in H.264/AVC intra mode. In this paper, we propose a theoretical method for extracting a thumbnail image from an H.264/AVC intra frame in the frequency domain. Furthermore, the proposed scheme can extract the thumbnail very fast since all operations are applied to transform coefficients directly, after a general equation for the thumbnail extraction in nine H.264/AVC intra prediction modes is introduced, an LUT(Look Up Table) for each mode is designed. Through the implementation and performance evaluation, while the subject quality difference between the output of our scheme and a conventional output is negligible, the former can extract the thumbnail faster then the latter by up to 63%.

• ETRI Journal
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• v.26 no.6
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• pp.657-660
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• 2004

We propose a fine phase tuner and a rounding processor for a numerically controlled oscillator (NCO), yielding a reduced phase error in generating a digital sine waveform. By using the fine phase tuner presented in this paper, when the ratio of the desired sine wave frequency to the clock frequency is expressed as a fraction, an accurate adjustment in representing the fractional value can be achieved with simple hardware. In addition, the proposed rounding processor reduces the effects of phase truncation on the output spectrum. Logic simulation results of the NCO using these techniques show that the noise spectrum and mean square error (MSE) for eight output bits of a 3.125 MHz sine waveform are reduced by 8.68 dB and 5.5 dB, respectively, compared to those of the truncation method, and 2.38 dB and 0.83 dB, respectively, compared to those of Paul's scheme.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.7
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• pp.970-979
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• 1993

In this paper, a multi-function processor unit is implemented for binary image processing. This unit consists of a set of address generatior, window pipeline register, look up table, control unit, and two local memories .The merits of multi-function processor unit are more simpler than basic SAP and improved disposal speed. A simple software selection give the various choices of image sizes and it can process the function of smoothing, thinning, feature extraction, and edge detection, selectively or sequentially.

• Proceedings of the KSR Conference
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• 2011.10a
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• pp.1888-1893
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• 2011

Considering the dynamic performance and stability of railroad vehicles has begun to grab the attention because of developing the high speed train recently. A development based on an analysis of dynamics and verification has to be required to study the stability of vehicle performance. Several ways of analysis were using the look-up table to apply the wheel-rail contact characteristics quickly, whereas there is a constraint of the wheelset lateral displacement. In this study, an development of searching the wheel-rail contact position has been provided. The 2-point contact between wheel and rail during the driving condition can be calculated by numerical analysis. Moreover, a reliability is verified by comparing the result with a commercial program.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.662-665
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• 2002

This paper describes a novel converter to implement high-speed binary-to-residue conversion for moduli 2$^{n}$ - 1, 2$^{n}$ , 2$^{n}$ +2$^{\alpha}$/($\alpha$$\in$｛0,1,…,n-1｝) without using look-up table. In our implementation, the high-speed converter can be achieved, because of the modulo addition time is independent of the word length of operands by using the Signed-Digit (SD) adders inside the modulo adders. For a LSI implementation of residue SD number system with ordinary binary system, the proposed binary-to-residue converter is the efficient circuit.cient circuit.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.4
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• pp.60-68
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• 1998

In this paper, content addressable momory(CAM) using neural network algorithm is proposed to decrease cell loss and process the large amount of data in streaming mode connectionless server at high speed. To overcome problems of area and power dissipation in look-up table using conventional CAM, the proposed neural network CAM is designed to increase linearly address storage bit about increase of address input bit. Its design and imulation is performed by using VHDL and Compass Tool. Also, its layout is performed by using chip compiler, cell-base P&R tool of compass, in 0.8 .mu.m design rule environment.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.10
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• pp.69-76
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• 1993

In this paper we propose a design of a digital neuron processor using the residue number system for efficient matrix.vector multiplication involved in neural processing. Since the residue number system needs no carry propagation for modulus operations, the neuron processor can perform multiplication considerably fast. We also propose a high speed algorithm for computing the sigmoid function using the specially designed look-up table. Our method can be implemented area-effectively using the current technology of digital VLSI and siumlation results positively demonstrate the feasibility of our method. The proposed method would expected to adopt for application field of digital neural network, because it could be realized to currently developed digital VLSI Technology.

• Journal of IKEEE
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• v.15 no.1
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• pp.10-14
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• 2011

In this paper, we present an efficient hardware architecture of unrolling image mapper of catadioptric omnidirectional imaging systems. The catadioptric omnidirectional imaging systems generate images of 360 degrees of view and need to be transformed into panorama images in rectangular coordinate. In most application, it has to perform the panorama unrolling in real-time and at low-cost, especially for high-resolution images. The proposed hardware architecture adopts a software/hardware cooperative structure and employs several optimization schemes using look-up-table(LUT) of coordinate conversion. To avoid the on-line division operation caused by the coordinate transformation algorithm, the proposed architecture has the LUT which has pre-computed division factors. And then, the amount of memory used by the LUT is reduced to 1/4 by using symmetrical characteristic compared with the conventional architecture. Experimental results show that the proposed hardware architecture achieves an effective real-time performance and lower implementation cost, and it can be applied to other kinds of catadioptric omnidirectional imaging systems.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.33 no.8
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• pp.316-324
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• 1984

In the wound rotor induction motor, the external resistor is usually added to the rotor circuit in order to limit the starting current. In this scheme, whilst the starting current is limited, the available torque is remarkably reduced. In this paper, to improve the starting characteristics the stator current can be maintained constant by adjusting the external resistor. To change the external resistor, teh chopper and the resistor is connected in parallel, and the chopper duty cycle is adjusted by microprocessor. The duty cycle is calculated according to the actual speed of motor by microprocessor look-up table map. In this suggested scheme, the starting characteristics are remarkably improved without over-current. The starting time of this system is reduced by 20-48 Percent compared with fixed extemal resistance system in the same load.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.1
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• pp.32-39
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• 2004

The color-based vision systems have been used to recognize our team robots, the opponent team robots and a ball in the robot soccer system. The color-based vision systems have the difficulty in that they are very sensitive to color variations brought by brightness changes. In this paper, a neural network trained with data obtained from various illumination conditions is used to classify colors in the modified YUV color space for the robot soccer vision system. For this, a new method to measure brightness is proposed by use of a color card. After the neural network is constructed, a look-up-table is generated to replace the neural network in order to reduce the computation time. Experimental results show that the proposed color classification method is robust under illumination variations.