• Title/Summary/Keyword: logic tree

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Study of Probabilistic Tsunami Hazard Analysis(PTHA) for Tsunami Hazard Assessment at Nuclear Power Plant (원자력발전소의 지진해일 위험도 평가를 위한 확률론적 지진해일 재해도 분석(PTHA))

  • Kim, Byung-Ho;Jeong, Hyun-Kee;Cho, Yong-Sik
    • Proceedings of the Korea Water Resources Association Conference
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    • 2021.06a
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    • pp.215-215
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    • 2021
  • 인도네시아 수마트라 지진해일(2004년)과 동일본 대지진(2011년)으로 인해 해당지역에서 막대한 인적·물적 피해가 발생하였으며, 지진해일에 대한 사람들의 경각심은 더욱 커지게 된 계기가 되었다. 반면 우리나라는 지진이 빈번하게 발생하는 국가에 비해 상대적으로 지진해일에 대해 안전하다는 국민들의 인식이 강한 것이 사실이다. 하지만 최근 우리나라에서 크고 작은 지진이 발생(2016년 경주 지진, 2017년 포항 지진 등)함에 따라 국민들은 지진 및 지진해일 안전에 대한 경각심이 높아지고 있다. 또한 한반도 주변에서 지진은 끊임없이 발생하고 있으며, 과거 우리나라는 지진해일로 인한 인명 및 재산피해가 기록된 사례도 존재한다(Cho, 2018). 본 연구에서는 원자력 발전소에서 지진해일에 대한 위험성에 대비하기 위해 지진해일 수치모형 실험을 통해 계산된 지진해일고 결과값에 대해 적절한 확률분포 모형을 개발한 후 각 지진해일 시나리오의 연초과 확률을 분석함으로써, 확률론적 지진해일 재해도 분석(PTHA : Probabilistic Tsunami Hazard Analysis)을 실시하는 것이다. 최종적으로는 연구대상지역의 지진해일 안전성 평가에 기여할 수 있는 검증된 자료를 제공한다. PTHA 분석은 미국(Park and Cox, 2016), 인도네시아(Horspool et al., 2014), 남유럽(Lorito et al., 2014), 일본(Japan Society of Civil Engineers, 2016) 등에서 연구가 활발하게 이루어졌으며 현재도 활발한 연구가 진행되고 있다. 본 논문에서는 먼저, 역사 지진해일 및 우리나라 근해에서 발생가능한 지진원(단층매개변수) 조사, 그리고 지진해일 수치모형실험 case 선정을 위한 파향선추적모형(wave ray-tracing) 수행, 마지막으로 지진해일고의 불확실성을 고려하기 위한 로직트리(Logic-Tree)기법 적용 시 사용하게 될 지진해일 단층매개변수 선정을 위한 지진해일 수치모형 실험 등을 수행한다.

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Root Causes and Characteristics of Occupational Incidents by Cause Investigation - Focusing on Maintenance and Repair Work - (사고 원인조사를 통한 농작업 안전사고 특성 연구 - 유지, 보수 작업을 중심으로 -)

  • Yongseok Shin;Hyocher Kim;Kyungsu Kim;Dongeok Kim
    • Journal of Agricultural Extension & Community Development
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    • v.30 no.2
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    • pp.119-129
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    • 2023
  • This study aims to identify the types of safety accidents that occur during maintenance and repair operations and analyze the root causes. We used the logic tree diagramming to extract the root causes of 65 safety incidents specifically related to maintenance and repair work out of a total of 1,024 agricultural safety incidents that occurred between 2007 and 2020 collected by investigation with interviews. The extracted root causes were analyzed by categorizing them into six different safety system classifications. The results of the analysis and suggestions are as follows. Incidents related to maintenance and repair work, which can lead to irreversible safety hazards, have occurred frequently. These incidents were found to be occurring due to the overlapping of various safety system errors such as personal protective system and safety operation procedure. In the short term, it is necessary to emphasize compliance with the use of personal protective equipment, and enhancement of maintenance training. In the long term, it is necessary to establish a legal distinction for maintenance and repair work and clarify the responsible parties. Introducing a maintenance system is also crucial to prevent occupational injuries during maintenance and repair in agriculture.

Analysis of Probability Distribution of Tsunami Heights for Development of Tsunami Prediction Model (지진해일고 예측모델 개발을 위한 지진해일고 확률분포 분석)

  • Kim, Byung-Ho;Yu, Jae-Ung;Cho, Yong-Sik;Kwon, Hyun-Han
    • Proceedings of the Korea Water Resources Association Conference
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    • 2022.05a
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    • pp.268-268
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    • 2022
  • 지진해일은 발생빈도는 높지 않지만, 한 번 발생하게 되면 막대한 피해를 일으킬 수 있다. 우리나라에서는 1,900년대 4건의 지진해일이 기록되었으며, 이로 인해 동해안 및 남해안 등에 인명피해 및 재산피해가 발생하였다. 또한 2011년 동일본 지진해일로 인해 후쿠시마 원자력 발전소 변전설비가 침수됨에 따라 냉각수 공급이 중단되고 방화벽이 파괴되어 방사능이 누출되어 큰 피해로 연결되었다. 이러한 피해를 저감하기 위해 지진해일 수치해석과 확률론적 분석방법 등 다양한 방법을 활용한 연구가 국내외 적으로 활발히 수행되고 있다. 본 연구는 확률분포기반 지진해일고 예측모델 개발을 위해 수치해석을 수행하여 지진해일고(tsunami heights)를 산출하고 결과값에 대한 적절한 확률분포 분석을 실시하는 것이다. 지진해일고는 원자력발전소에서 취수구를 통한 냉각수 공급가능 여부를 판단하기 위해 최대 지진해일고(maximum tsunami height)와 최저 지진해일고(minimum tsunami height)로 구분하였다. 지진해일 수치해석은 지진원(단층매개변수) 조사, 조사된 지진원 중 지진해일 수치해석 case 선정을 위한 파향선추적기법(wave ray tracing) 수행, 선정된 지진원에 대해 로직트리(logic tree) 기법 적용, 로직트리를 적용한 지진원 case에 대한 수치해석 순서로 수행하였다. 수치해석을 통해 산출된 최대 및 최저 지진해일고 자료를 기반으로 확률분포형을 선정하기 위하여 확률분포별 적합성 평가를 실시하였다. 선정된 분포를 기준으로 처오름 및 처내림높이와 관련된 다양한 변수간의 의존관계를 파악하였다. 향후, 파악된 의존관계를 기반으로 예측모델을 개발하여 수치해석 결과와 연계함으로써 국내에 적용할 수 있는 확률론적 지진해일재해도를 제시할 수 있을 것으로 판단된다.

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An Implementation of Low Power MAC using Improvement of Multiply/Subtract Operation Method and PTL Circuit Design Methodology (승/감산 연산방법의 개선 및 PTL회로설계 기법을 이용한 저전력 MAC의 구현)

  • Sim, Gi-Hak;O, Ik-Gyun;Hong, Sang-Min;Yu, Beom-Seon;Lee, Gi-Yeong;Jo, Tae-Won
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.4
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    • pp.60-70
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    • 2000
  • An 8$\times$8+20-bit MAC is designed with low power design methodologies at each of the system design levels. At algorithm level, a new method for multipl $y_tract operation is proposed, and it saves the transistor counts over conventional methods in hardware realization. A new Booth selector circuit using NMOS pass-transistor logic is also proposed at circuit level. It is superior to other circuits designed by CMOS in power-delay-product. And at architecture level, we adopted an ELM adder that is known to be the most efficient in power consumption, operating frequency, area and design regularity as the final adder. For registers, dynamic CMOS single-edge triggered flip-flops are used because they need less transistors per bit. To increase the operating frequency 2-stage pipeline architecture is adopted, and fast 4:2 compressors are applied in Wallace tree block. As a simulation result, the designed MAC in 0.6${\mu}{\textrm}{m}$ 1-poly 3-metal CMOS process is operated at 200MHz, 3.3V and consumed 35㎽ of power in multiply operation, and operated at 100MHz consuming 29㎽ in MAC operations, respectively.ly.

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Development of CPLD Technology Mapping Algorithm for Sequential Circuit Improved Run-Time Under Time Constraint (시간제약 조건하에서 순차 회로를 위한 수행시간을 개선한 CPLD 기술 매핑 알고리즘 개발)

  • Yun, Chung-Mo;Kim, Hui-Seok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.4
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    • pp.80-89
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    • 2000
  • In this paper, we propose a new CPLD technology mapping algorithm for sequential circuit under time constraints. The algorithm detects feedbacks of sequential circuit, separate each feedback variables into immediate input variable, and represent combinational part into DAG. Also, among the nodes of the DAG, the nodes that the number of outdegree is more than or equal to 2 is not separated, but replicated from the DAG, and reconstructed to fanout-free-tree. To use this construction method is for reason that area is less consumed than the TEMPLA algorithm to implement circuits, and process time is improved rather than TMCPLD within given time constraint. Using time constraint and delay of device the number of partitionable multi-level is defined, the number of OR terms that the initial costs of each nodes is set to and total costs that the$^1$costs is set to after merging nodes is calculated, and the nodes that the number of OR terms of CLBs that construct CPLD is excessed is partitioned and is reconstructed as subgraphs. The nodes in the partitioned subgraphs is merged through collapsing, and the collapsed equations is performed by bin packing so that it fit to the number of OR terms in the CLBs of a given device. In the results of experiments to MCNC circuits for logic synthesis benchmark, we can shows that proposed technology mapping algorithm reduces the number of CLBs by 15.58% rather than the TEMPLA, and reduces process time rather than the TMCPLD.

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Development of CPLD technology mapping algorithm for Sequential Circuit under Time Constraint (시간제약 조건하에서 순차 회로를 위한 CPLD 기술 매핑 알고리즘 개발)

  • Youn, Chung-Mo;Kim, Hi-Seok
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.1
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    • pp.224-234
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    • 2000
  • In this paper, we propose a new CPLD technology mapping algorithm for sequential circuit under time constraints. The algorithm detects feedbacks of sequential circuit, separate each feedback variables into immediate input variable, and represent combinational part into DAG. Also, among the nodes of the DAG, the nodes that the number of outdegree is more than or equal to 2 is not separated, but replicated from the DAG, and reconstructed to fanout-free-tree. To use this construction method is for reason that area is less consumed than the TEMPLA algorithm to implement circuits, and process time is improved rather than TMCPLD within given time constraint. Using time constraint and delay of device the number of partitionable multi-level is defined, the number of OR terms that the initial costs of each nodes is set to and total costs that the costs is set to after merging nodes is calculated, and the nodes that the number of OR terms of CLBs that construct CPLD is excessed is partitioned and is reconstructed as subgraphs. The nodes in the partitioned subgraphs is merged through collapsing, and the collapsed equations is performed by bin packing so that if fit to the number of OR terms in the CLBs of a given device. In the results of experiments to MCNC circuits for logic synthesis benchmark, we can shows that proposed technology mapping algorithm reduces the number of CLBs bu 15.58% rather than the TEMPLA, and reduces process time rather than the TMCPLD.

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An Efficient CPLD Technology Mapping considering Area under Time Constraint (시간 제약 조건하에서 면적을 고려한 효율적인 CPLD 기술 매핑)

  • Kim, Jae-Jin;Kim, Hui-Seok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.1
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    • pp.79-85
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    • 2001
  • In this paper, we propose a new technology mapping algorithm for CPLD consider area under time constraint(TMFCPLD). This technology mapping algorithm detect feedbacks from boolean networks, then variables that have feedback are replaced to temporary variables. Creating the temporary variables transform sequential circuit to combinational circuit. The transformed circuits are represented to DAG. After traversing all nodes in DAG, the nodes that have output edges more than two are replicated and reconstructed to fanout free tree. This method is for reason to reduce area and improve total run time of circuits by TEMPLA proposed previously. Using time constraints and delay time of device, the number of graph partitionable multi-level is decided. Initial cost of each node are the number of OR-terms that it have. Among mappable clusters, clusters of which the number of multi-level is least is selected, and the graph is partitioned. Several nodes in partitioned clusters are merged by collapsing, and are fitted to the number of OR-terms in a given CLB by bin packing. Proposed algorithm have been applied to MCNC logic synthesis benchmark circuits, and have reduced the number of CLBs by 62.2% than those of DDMAP. And reduced the number of CLBs by 17.6% than those of TEMPLA, and reduced the number of CLBs by 4.7% than those of TMCPLD. This results will give much efficiency to technology mapping for CPLDs.

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Analysis of Automatic Meter Reading Systems (IBM, Oracle, and Itron) (국외 상수도 원격검침 시스템(IBM, Oracle, Itron) 분석)

  • Joo, Jin Chul;Kim, Juhwan;Lee, Doojin;Choi, Taeho;Kim, Jong Kyu
    • Proceedings of the Korea Water Resources Association Conference
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    • 2017.05a
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    • pp.264-264
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    • 2017
  • 국외의 상수도 원격검침 시스템 내 데이터 전송방식은 도시 규모, 계량기의 밀도, 전력공급 여부 및 통신망의 설치 여부 등을 종합적으로 고려하여 결정되었다. 대부분의 스마트워터미터 제조업체들은 계량기의 부호기가 공급하는 판독 내용(데이터)을 전송할 검침단말기와 근거리 통신망(neighborhood area network)을 연계하여 개발 및 판매하였으며, 자체 소유 통신 프로토콜을 사용하여 라디오 주파수(RF) 통신 기술을 사용하고 있다. 광역통신망(wide area network)의 경우, 노드(말단의 계량기 및 센서)들과 이에 연결된 통신망 들을 포함한 네트웍의 배열이나 구성이 스타(star), 메쉬(mesh), 버스(bus), 나무(tree) 등의 형태로 통신망이 구성되어 있으나, 스타와 메쉬형 통신망 구성형태가 가장 널리 활용되는 것으로 조사되었다. 시스템 통합운영관리 업체들인 IBM, Oracle, Itron 등은 용수 인프라 관리 또는 통합네트워크 솔루션 등의 통합 물관리 시스템(integrated water management system)을 개발하여 현장적용을 하고 있으며, 원격검침 시스템을 통해 고객들의 현재 소비량과 과거 누적 소비량, 누수 감지 서비스 및 실시간 요금 고지 등을 실시간으로 웹 포털과 앱을 통해 제공하고 있다. 또한, 일부 제조업체들은 도시 용수공급/소비 관리자가 주민의 용수사용량을 모니터링하여 일평균 용수사용량 및 사용 경향을 파악하고, 누수를 검지하여 복구 및 용수 사용 지속가능성 지수를 제시하고, 실시간으로 주민의 용수사용량 관련 데이터를 모니터링하여 용수공급의 최적화를 위한 의사결정지원 서비스를 용수공급자에게 제공하고 있다. 최근에는 인공지능을 활용해 가정용수의 용도별(세탁용수, 화장실용수, 샤워용수, 식기세척용수 등) 사용량 곡선을 패터닝하여 profiling 기법을 도입해, 스마트워터미터에서 용수사용량이 통합되어 검지될 시 용수사용량의 세부 용도별 re-profiling 기법을 도입하여 가정용수내 과소비되는 지점을 도출 후 절감을 유도하는 기술이 개발 중이다. 또한, 미래 용수 사용량 예측을 위해 다양한 시계열 자료를 분석하는 선형 종속 모형(자기회귀모형, 자기회귀이동평균모형, 자기회귀적분이동평균모형 등)과 비선형 종속 모형(Fuzzy Logic, Neural Network, Genetic Algorithm 등)을 활용한 예측기능이 구축되어 상호 비교하여 최적의 용수사용량 예측 도구를 제공되고 있다.

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A Study on Decision Rules for Qi·Blood·Yin·Yang Deficiency Pathogenic Factor Based on Clinical Data of Diagnosis System of Oriental Medicine (한방진단설문지 임상자료에 근거한 기혈음양 허증병기 의사결정규칙 연구)

  • Soo Hyung Jeon;In Seon Lee;Gyoo yong Chi;Jong Won Kim;Chang Wan Kang;Yong Tae Lee
    • Journal of Physiology & Pathology in Korean Medicine
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    • v.37 no.6
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    • pp.172-177
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    • 2023
  • In order to deduce the pathogenic factor(PF) diagnosis logic of underlying in pattern identification of Korean medicine, 2,072 cases of DSOM(Diagnosis System of Oriental Medicine) data from May 2005 to April 2022 were collected and analyzed by means of decision tree model(DTM). The entire data were divided into training data and validation data at a ratio of 7:3. The CHAID algorithm was used for analysis of DTM, and then validity was tested by applying the validation data. The decision rules of items and pathways determined from the diagnosis data of Qi Deficiency, Blood Deficiency, Yin Deficiency and Yang Deficiency Pathogenic Factor of DSOM were as follows. Qi Deficiency PF had 7 decision rules and used 5 questions: Q124, Q116a, Q119, Q119a, Q55. The primary indicators(PI) were 'lack of energy' and 'weary of talking'. Blood deficiency PF had 7 decision rules and used 6 questions: Q113, Q84, Q85, Q114, Q129, Q130. The PI were 'numbness in the limbs', 'dizziness when standing up', and 'frequent cramps'. Yin deficiency PF had 3 decision rules and used 2 questions: Q144 and Q56. The PI were 'subjective heat sensation from the afternoon to night' and 'heat sensation in the limbs'. Yang deficiency PF had 3 decision rules and used 3 questions: Q55, Q10, and Q102. The PI were 'sweating even with small movements' and 'lack of energy'. Conclusively, these rules and symptom information to decide the Qi·Blood·Yin·Yang Deficiency PF would be helpful for Korean medicine diagnostics.

The Implication and Issues of Landscape Design Education through National Exhibition of Korean Landscape Architecture (대한민국환경조경대전을 통해 본 조경 설계 교육의 쟁점과 시사점)

  • Choi, Jung-Mean;Yun, Su-jin
    • Journal of the Korean Institute of Landscape Architecture
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    • v.44 no.2
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    • pp.108-121
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    • 2016
  • The purpose of this study is to explore the issues and implications for landscape design education in Korean landscape architecture by analyzing the National Exhibition of Korean Landscape Architecture(NEKLA). This study analyzed the suggested topics and selected site as well as the commentary that appeared in the NEKLA's award-winning book published from 2004 to 2014. Results of the study are as follows: First, topics of NEKLA are not only competition guidelines but related to exploring new area and role of Korean landscape architecture. Second, most dealing with site is 'industrial heritage and regeneration space' and 'green infrastructure'. In more recent years, a larger variety of sites were addressed. Third, site locations are concentrated in metropolitan areas, and awards and participation of the non-metropolitan universities was very low. Fourth, seven criteria can be applied in a general landscape design competition such as 'newness of the concept(idea)', 'logicality of the design process', 'selection of site fidelity of analysis(interpretation)', 'presentation and completion of the master plan', 'consistency with the theme', 'linkage of concepts and results' and 'feasibility'. The evaluation criteria are increasing the sophistication of the design language to provide useful suggestions on how to find design education methods. Its implications are as follows: First, training is essential to derive innovative ideas, but it should avoid excessive concept-oriented education. Second, design education may include instruction on how to define the problems related with the site. Third, more emphasis on design logic is essential to transform the innovative concept to actual results. Fourth, 'slick images' unrelated to design should be suppressed. Fifth, practice is needed to solve the topics addressed in the design process of education. Sixth, 'feasibility' and 'creative thinking' are necessary to recognize a reciprocal relationship that is helpful to one another. This study uses direct quote commentary to minimize the subjectivity of the researcher and to trace issues of the contemporary landscape architecture more directly and vividly. This study is a record waiting for another review as meta-criticism. In this regard this study, the landscape architect of the next times will have a mean that historical records to review the current thinking of the landscape theory and design.