• Title/Summary/Keyword: logic device

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Optical AND/OR gates based on monolithically integrated vertical cavity laser with depleted optical thyristor (집적화된 광 싸이리스터와 수직구조 레이저를 이용한 광 로직 AND/OR 게이트에 관한 연구)

  • Kim Doo-Gun;Jung In-Il;Choi Young-Wan;Choi Woon-Kyung
    • 한국정보통신설비학회:학술대회논문집
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    • 2006.08a
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    • pp.19-23
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    • 2006
  • Latching optical switches and optical logic gates AND and OR are demonstrated, for the first time, by the monolithic integration of a vertical cavity lasers with depleted optical thyristor structure, which have not only a low threshold current with 0.65 mA. but also a high on/off contrast ratio more than 50 dB. By simple operating technique with changing a reference switching voltage, this single device operates as two logic functions, optical logic AND and OR. The thyristor laser fabricated using the oxidation process achieved a high optical output power efficiency and a high sensitivity to the optical input light.

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Tabular Methods for the Design of Multivalued Logic Circuits Using CCD (CCD를 이용한 다치논린회로의 설계에 관한 Tabular법)

  • 송홍복;정만영
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.13 no.5
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    • pp.411-421
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    • 1988
  • This paper offers a method to design CCD four-valued circuits using the tabular method. First, the four-valued logic function is decomposed by hand-calculation or computer program. Nest, the algorithm is derived form the tabular method based on the decomposition process to realize the DDC four-valued circuit. According to this algorithm, the two-variable four valued logic function is decomposed and realized by CCD network with four basic gates. The synthesis method in this paper proves that the number of devices and cost is considerably reduces as compared with the existing methods to realize the same logic functions.

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Characteristics of Top-Surface-Emitting Microlasers and Active Surface Emitting Laser Logic Devices (표면광 마이크로레이저 및 능동형 광학 연산소자의 특성)

  • 이용희
    • Korean Journal of Optics and Photonics
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    • v.2 no.4
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    • pp.233-241
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    • 1991
  • Structures, fabrication, and characteristics of top-surface-emitting GaAs four quantum well microlaser are described. The microlasers have good room-temperautre CW characteristivs. The maximum CW laser output is >3mW from a 30 $\mu\textrm{m}$ diameter microlaser and the maximum differential quantum efficiency is >70% from a 10 $\mu\textrm{m}$ diameter microlaser. Active surface emitting laser logic devices are designed and fabricated as a discrete version of a top-surface-emitting laser and heterojunction phototransistor. The active surface emitting laser logic device have high optical gain (>20 overall, >200 differential) and very high on/off ratio. Two-dimensional arrays of top-surface-emitting microlasers and active surface emitting laser logic devices will be critical elements for optical computing, photonic switching and neural network applications.

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Logic circuit design for high-speed computing of dynamic response in real-time hybrid simulation using FPGA-based system

  • Igarashi, Akira
    • Smart Structures and Systems
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    • v.14 no.6
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    • pp.1131-1150
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    • 2014
  • One of the issues in extending the range of applicable problems of real-time hybrid simulation is the computation speed of the simulator when large-scale computational models with a large number of DOF are used. In this study, functionality of real-time dynamic simulation of MDOF systems is achieved by creating a logic circuit that performs the step-by-step numerical time integration of the equations of motion of the system. The designed logic circuit can be implemented to an FPGA-based system; FPGA (Field Programmable Gate Array) allows large-scale parallel computing by implementing a number of arithmetic operators within the device. The operator splitting method is used as the numerical time integration scheme. The logic circuit consists of blocks of circuits that perform numerical arithmetic operations that appear in the integration scheme, including addition and multiplication of floating-point numbers, registers to store the intermediate data, and data busses connecting these elements to transmit various information including the floating-point numerical data among them. Case study on several types of linear and nonlinear MDOF system models shows that use of resource sharing in logic synthesis is crucial for effective application of FPGA to real-time dynamic simulation of structural response with time step interval of 1 ms.

Two-dimensional numerical simulation study on the nanowire-based logic circuits (나노선 기반 논리 회로의 이차원 시뮬레이션 연구)

  • Choi, Chang-Yong;Cho, Won-Ju;Chung, Hong-Bay;Koo, Sang-Mo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.82-82
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    • 2008
  • One-dimensional (1D) nanowires have been received much attention due to their potential for applications in various field. Recently some logic applications fabricated on various nanowires, such as ZnO, CdS, Si, are reported. These logic circuits, which consist of two- or three field effect transistors(FETs), are basic components of computation machine such as central process unit (CPU). FETs fabricated on nanowire generally have surrounded shapes of gate structure, which improve the device performance. Highly integrated circuits can also be achieved by fabricating on nano-scaled nanowires. But the numerical and SPICE simulation about the logic circuitry have never been reported and analyses of detailed parameters related to performance, such as channel doping, gate shapes, souce/drain contact and etc., were strongly needed. In our study, NAND and NOT logic circuits were simulated and characterized using 2- and 3-dimensional numerical simulation (SILVACO ATLAS) and built-in spice module(mixed mode).

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Implementation of Brushless Linear Motor Drive using DSP (DSP를 이용한 브러쉬 없는 선형 모터 드라이브 구현)

  • Kim, Sang-U;Park, Jeong-Il;Lee, Gi-Dong;Lee, Seok-Gyu;Jeong, Jae-Han
    • Journal of the Korean Society for Precision Engineering
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    • v.19 no.8
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    • pp.155-160
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    • 2002
  • In this paper, a controller design for brushless linear motor is implemented. The designed controller is mainly composed of current, speed and position controller, which are carried out by the high-speed digital signal processor (DSP). In addition the PWM inverter is controlled by space voltage PWM method. This system is implemented by using 32-bit DSP (TMS320C31), a high-integrated logic device (EPM7192), and IPM (Intelligent Power Module) for compact and powerful system design. The experimental results show the effective performance of controller for the brushless linear motor.

Development of the linear motor driver with high speed and stiffness based on SERCOS (SERCOS 기반의 고속 고강성 이송시스템 드라이버 개발)

  • 최정원;김상은;이기동;박정일;이석규
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 1997.10a
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    • pp.64-68
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    • 1997
  • In this paper, a controller for the linear motor with high speed and stiffness is implemented using SERCOS interface which is a real time communication protocol between the numerical controller(NC) and the motor driver. The proposed controller is mainly composed of current, speed, and position controller, which are designed using the 32-bit DSP(TMS320C31), a high-integrated logic device (EPM7128), and Intelligent Power Module(IPM) to enhance reliability and compactness of the system. The experimental results show the effective performance of the proposed controller for he linear motor with high speed and stiffness.

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Development of Linear motor diver for high speed and stiffness feed system (고속 고강성 이송시스템을 위한 리니어 모터 드라이브 개발)

  • 최정원;김상은;이기동;박정일;이석규
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2001.04a
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    • pp.167-169
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    • 2001
  • In this paper, a controller design for high speed and stiffness linear motor is implemented. The designed controller is mainly composed of speed and current controller, which are carried out by the high-speed digital signal processor(DSP). In addition the PWM inverter is controlled by space voltage PWM method. This system is implemented by using 32-bit DSP(TMS320C31), a high-integrated logic device(EPM7128), and IPM(Intelligent Power Module) for compact and powerful system design. The experimental results show the effective performance of controller for high speed and stiffness linear motor.

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Development of a stroke output control algorithm using a fuzzy logic for a left ventricular assist device

  • Choi, Jae-Soon;Choi, Won-Woo;Park, Seong-Keun;Park, Seong-Keun;Min, Byoung-Goo
    • 제어로봇시스템학회:학술대회논문집
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    • 1995.10a
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    • pp.514-517
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    • 1995
  • A new stroke output control algorithm with a fuzzy logic for an electrohydraulic left ventricular assist device(EH-LVAD) was developed. The EH-LVAD pumps out blood from left atrium actively. Excessive suction of blood may cause fatal damage in left atrium. The LVAD has to provide a maximal stroke output without collapse of left atrium. In this study a new fuzzy algorithm for predicting and detecting suction and doing proper action on LVAD without using an extra pressure sensor but with bellows pressure signal and motor current signal is developed. The performance of the fuzzy control algorithm is demonstrated by the results from mock circulatory experiments.

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Effects of Ti and TiN Capping Layers on Cobalt-silicided MOS Device Characteristics in Embedded DRAM and Logic

  • Kim, Jong-Chae;Kim, Yeong-Cheol;Choy, Jun-Ho
    • Journal of the Korean Ceramic Society
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    • v.38 no.9
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    • pp.782-786
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    • 2001
  • Cobalt silicide has been employed to Embedded DRAM (Dynamic Random Access Memory) and Logic (EDL) as contact material to improve its speed. We have investigated the influences of Ti and TiN capping layers on cobalt-silicided Complementary Metal-Oxide-Semiconductor (CMOS) device characteristics. TiN capping layer is shown to be superior to Ti capping layer with respect to high thermal stability and the current driving capability of pMOSFETs. Secondary Ion Mass Spectrometry (SIMS) showed that the Ti capping layer could not prevent the out-diffusion of boron dopants. The resulting operating current of MOS devices with Ti capping layer was degraded by more than 10%, compared with those with TiN.

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