• Journal of the Korea Institute of Information Security & Cryptology
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• v.13 no.2
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• pp.127-132
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• 2003

Cryptosystems have received very much attention in recent years as importance of information security is increased. Most of Cryptosystems are defined over finite or Galois fields GF($2^m$) . In particular, the finite field GF($2^m$) is mainly used in public-key cryptosystems. These cryptosystems are constructed over finite field arithmetics, such as addition, subtraction, multiplication, and multiplicative inversion defined over GF($2^m$) . Hence, to implement these cryptosystems efficiently, it is important to carry out these operations defined over GF($2^m$) fast. Among these operations, since multiplicative inversion is much more time-consuming than other operations, it has become the object of lots of investigation. Recently, many methods for computing multiplicative inverses at hi호 speed has been proposed. These methods are based on format's theorem, and reduce the number of required multiplication using normal bases over GF($2^m$) . The method proposed by Itoh and Tsujii[2] among these methods reduced the required number of times of multiplication to O( log m) Also, some methods which improved the Itoh and Tsujii's method were proposed, but these methods have some problems such as complicated decomposition processes. In practical applications, m is frequently selected as a power of 2. In this parer, we propose a fast method for computing multiplicative inverses in GF($2^m$) , where m = ($2^n$) . Our method requires fewer ultiplications than the Itoh and Tsujii's method, and the decomposition process is simpler than other proposed methods.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.4
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• pp.160-167
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• 2005

Among finite filed arithmetic operations, division/inverse is known as a basic operation for public-key cryptosystems over $GF(2^{m})$ and it is computed by performing the repetitive $AB^{2}$ multiplication. This paper presents a digit-serial-in-serial-out systolic architecture for performing the $AB^2$ operation in GF$(2^{m})$. To obtain L×L digit-serial-in-serial-out architecture, new $AB^{2}$ algorithm is proposed and partitioning, index transformation and merging the cell of the architecture, which is derived from the algorithm, are proposed. Based on the area-time product, when the digit-size of digit-serial architecture, L, is selected to be less than about m, the proposed digit-serial architecture is efficient than bit-parallel architecture, and L is selected to be less than about $(1/5)log_{2}(m+1)$, the proposed is efficient than bit-serial. In addition, the area-time product complexity of pipelined digit-serial $AB^{2}$ systolic architecture is approximately $10.9\%$ lower than that of nonpipelined one, when it is assumed that m=160 and L=8. Additionally, since the proposed architecture can be utilized for the basic architecture of crypto-processor and it is well suited to VLSI implementation because of its simplicity, regularity and pipelinability.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.6
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• pp.24-30
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• 2003

This study focuses on the arithmetical methodology and hardware implementation of low system-complexity A $B^2$＋C operator over GF(2$^{m}$ ) using the irreducible AOP of degree m. The proposed parallel-in parallel-out operator is composed of CS, PP, and MS modules, each can be established using the array structure of AND and XOR gates. The proposed multiplier is composed of (m＋1)$^2$ 2-input AND gates and (m＋1)(m＋2) 2-input XOR gates. And the minimum propagation delay is $T_{A}$ ＋(1＋$\ulcorner$lo $g_2$$^{m}$ $\lrcorner$) $T_{x}$ . Comparison result of the related A $B^2$＋C operators of GF(2$^{m}$ ) are shown by table, It reveals that our operator involve more lower circuit complexity and shorter propagation delay then the others. Moreover, the interconnections of the out operators is very simple, regular, and therefore well-suited for VLSI implementation.

• Journal of KIISE:Computer Systems and Theory
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• v.30 no.5_6
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• pp.324-329
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• 2003

The public-key cryptosystems such as Diffie-Hellman Key Distribution and Elliptical Curve Cryptosystems are built on the basis of the operations defined in GF(2$^{m}$ ):addition, subtraction, multiplication and multiplicative inversion. It is important that these operations should be computed at high speed in order to implement these cryptosystems efficiently. Among those operations, as being the most time-consuming, multiplicative inversion has become the object of lots of investigation Formant's theorem says $\beta$$^{-1}$ =$\beta$$^{2}$sup m/-2/, where $\beta$$^{-1}$ is the multiplicative inverse of $\beta$$\in$GF(2$^{m}$ ). Therefore, to compute the multiplicative inverse of arbitrary elements of GF(2$^{m}$ ), it is most important to reduce the number of times of multiplication by decomposing 2$^{m}$ -2 efficiently. Among many algorithms relevant to the subject, the algorithm proposed by Itoh and Tsujii[2] has reduced the required number of times of multiplication to O(log m) by using normal basis. Furthermore, a few papers have presented algorithms improving the Itoh and Tsujii's. However they have some demerits such as complicated decomposition processes[3,5]. In this paper, in the case of 2$^{m}$ -2, which is mainly used in practical applications, an efficient algorithm is proposed for computing the multiplicative inverse at high speed by using both the factorization formula x$^3$-y$^3$=(x-y)(x$^2$＋xy＋y$^2$) and normal basis. The number of times of multiplication of the algorithm is smaller than that of the algorithm proposed by Itoh and Tsujii. Also the algorithm decomposes 2$^{m}$ -2 more simply than other proposed algorithms.

• Proceedings of the IEEK Conference
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• 2003.07a
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• pp.109-112
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• 2003

본 논문에서는 확장 유클리드 알고리즘을 이용하여 VLSI 구현에 적합한 GF(2/sup m/)에서의 나눗셈 알고리즘을 제안하였다. 제안하는 나눗셈 알고리즘은 GF(2/sup m/)에서 2m-2번의 반복적인 비트 연산을 필요로 하며 입력 데이터에 의존적인 하드웨어 구조를 새로운 (m+1)-bit의 유한체 G와 H를 도입하여 간단하게 제어하도록 구현하였다. 본 논문에서 제안하는 알고리즘은 유한체 곱셈과 나눗셈이 요구되는 Error Correction Code와 암호 알고리즘에 효율적으로 적용이 가능하다. 현재 대표적으로 사용되는 기존 나눗셈 알고리즘과 비교해 볼 때 연산 시간은 비슷하지만 2-bit의 제어신호만을 필요로 하기 때문에 입력 데이터에 독립적인 O(1)의 complexity를 가짐으로 O(log₂(m+1))의 컨트롤을 갖는 다른 두 알고리즘에 비해 하드웨어 리소스 면에서 월등한 결과를 보인다.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.18 no.2
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• pp.3-10
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• 2008

The choice of basis for representation of element in $GF(2^m)$ affects the efficiency of a multiplier. Among them, a multiplier using redundant representation efficiently supports trade-off between the area complexity and the time complexity since it can quickly carry out modular reduction. So time of a previous multiplier using redundant representation is faster than time of multiplier using others basis. But, the weakness of one has a upper space complexity compared to multiplier using others basis. In this paper, we propose a new efficient multiplier with consideration that polynomial exponentiation operations are frequently used in cryptographic hardwares. The proposed multiplier is suitable fer left-to-right exponentiation environment and provides efficiency between time and area complexity. And so, it has both time delay of $T_A+({\lceil}{\log}_2m{\rceil})T_x$ and area complexity of (2m-1)(m+s). As a result, the proposed multiplier reduces $2(ms+s^2)$ compared to the previous multiplier using equally-spaced polynomials in area complexity. In addition, it reduces $T_A+({\lceil}{\log}_2m+s{\rceil})T_x$ to $T_A+({\lceil}{\log}_2m{\rceil})T_x$ in the time complexity.($T_A$:Time delay of one AND gate, $T_x$:Time delay of one XOR gate, m:Degree of equally spaced irreducible polynomial, s:spacing factor)

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.13 no.9
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• pp.4788-4813
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• 2019

In this paper, we introduce concepts of optimal and near optimal secret data hiding schemes. We present a new digital image steganography approach based on the Galois field $GF(p^m)$ using graph and automata to design the data hiding scheme of the general form ($k,N,{\lfloor}{\log}_2p^{mn}{\rfloor}$) for binary, gray and palette images with the given assumptions, where k, m, n, N are positive integers and p is prime, show the sufficient conditions for the existence and prove the existence of some optimal and near optimal secret data hiding schemes. These results are derived from the concept of the maximal secret data ratio of embedded bits, the module approach and the fastest optimal parity assignment method proposed by Huy et al. in 2011 and 2013. An application of the schemes to the process of hiding a finite sequence of secret data in an image is also considered. Security analyses and experimental results confirm that our approach can create steganographic schemes which achieve high efficiency in embedding capacity, visual quality, speed as well as security, which are key properties of steganography.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.14 no.1
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• pp.113-119
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• 2004

Exponentiation is widely used in practical applications related with cryptography, and as the discrete log is easily solved in case of a low exponent n, a large exponent n is needed for a more secure system. However. since the time complexity for exponentiation algorithm increases in proportion to the n figure, the development of an exponentiation algorithm that can quickly process the results is becoming a crucial problem. In this paper, we propose a parallel exponentiation algorithm which can reduce the number of rounds with a fixed number of processors, where the field elements are in GF($2^m$), and also analyzed the round bound of the proposed algorithm. The proposed method uses window method which divides the exponent in a particular bit length and make idle processors in window value computation phase to multiply some terms of windows where the values are already computed. By this way. the proposed method has improved round bound.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.12
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• pp.29-40
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• 2008

The efficient hardware design of finite field multiplication is an very important research topic for and efficient $f(x)=x^n+x^k+1$ implementation of cryptosystem based on arithmetic in finite field GF($2^n$). We used special generating trinomial to construct a bit-parallel multiplier over finite field with low space complexity. To reduce processing time, The hardware architecture of proposed multiplier is similar with existing Mastrovito multiplier. The complexity of proposed multiplier is depend on the degree of intermediate term $x^k$ and the space complexity of the new multiplier is $2k^2-2k+1$ lower than existing multiplier's. The time complexity of the proposed multiplier is equal to that of existing multiplier or increased to $1T_X(10%{\sim}12.5%$) but space complexity is reduced to maximum 25%.

• Journal of the Korean Society of Clothing and Textiles
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• v.13 no.3 s.31
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• pp.259-267
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• 1989

In this paper, the fabric specimen undergoes repeated laundering under given condition. After this cyclic laundering was applied, the crease recoveries of the specimen were measured using shirley crease revovery tester in order to evaluate the effect of factors at given condition during crease deformation. 5 samples of grey plain cloth were desized, alkali-scoured, bleached, whased with water, and air-dried. All tests were made on samples preconditioned to $65\%\;RH\;and\;20^{\circ}C$. The experimental results were analysed statistically to relate crease recoveries and the properties of smaples, recovery periods (time) of crease. Furthermore, the crease recoveries of core-spun yarn woven fabrics were discussed in comparison with those values for $100\%$ combed cotton yarn woven fabric and $65\%$ polyester $35\%$ carded cotton blended yarn woven fabric. The results obtained are as follows; 1. Regardless of materials, remarkable decrease are observed in crease recoveries about 1-5 cycles of the repeated laundering, but slack decrease are observed in crease recoveries after 5 cycle of the re-peated laundering. 2. Crease recoveries ($\alpha$) of core-spun yarn woven fabrics are relate to recovery periods (t) of crease as follows; log$\alpha$=0.01415 log t+2.1168 ($r^2=0.94$) 3. Core-spun yarn woven fabrics were superior to $100\%$ combed cotton yarn woven fabrics and $65\%$ polyester $35\%$ carded cotton blended yarn woven fabric in crease recoveries. 4. Crease recoveries ($\alpha$) of core-spun yarn woven fabrics are relate to cover factor (CF), thickness (T) at pressure 0.5 $gf/cm^2$, weight (W) as follows; log$\alpha$=-0.3482 log CF-0.4924 log T-0.4727 W+2.4243 ($r^2=0.88$) 5. Crease recoveries ($\alpha$) of core-spun yarn woven fabrics are relate to 2HB/B, 2HB/W, $\sqrt[3]{B/W}$, WC/T which are concerning to formation of weared clothes and bending Iran formation behavior as follows: log $\alpha$=0.0091 2HB/B+0.4667 2HB/W+0.0185 $\sqrt[3]{B/W}$+0.0114 WC/T+1.8433 ($r^2=0.86$)