• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.2
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• pp.33-43
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• 1993

Lock mechanism is essential for synchronization on the multiprocessor systems. Lock mechanism needs to reduce the time for lock operation in low lock contention. Lock mechanism must consider the case of the high lock contention. The conventional lock control scheme in memory results in the increase of bus traffic and memory utilization in lock operation. This paper suggests a lock scheme which stores the lock data in cache and manages it efficiently to reduce the time spent in lock operation when the lock contention is low on a multiprocessor system built on HiPi-bus(Highly Pipelined bus). This paper also presents the design of the HIPi-CLOCK (Highly Pipelined bus Cache LOCK mechanism) which transfere the data from on cache to another when the lock contention is high. The designed simulator compares the conventional lock scheme which controls the lock in memory with the suggested HiPi-CLOCK scheme in terms of the RMW(Read-Modify-Write) operation time using simulated trace. It is shown that the suggested lock control scheme performance is over twice than that of the conventional method in low lock contention. When the lock contention is high, the performance of the suggested scheme increases as the number of the shared lock data increases.

• Journal of Electrical Engineering and Technology
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• v.2 no.3
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• pp.289-293
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• 2007

The fault current limiting characteristics of the separated and the integrated three-phase flux-lock type superconducting fault current limiters (SFCLs) were analyzed. The three-phase flux-lock type SFCL consisted of three flux-lock reactors and three $high-T_c$ superconducting (HTSC) elements. In the integrated three-phase flux-lock type SFCL, three flux-lock reactors are connected on the same iron core. On the other hand, three flux-lock reactors of the separated three-phase flux-lock type SFCL are connected on three separated iron cores. The integrated three-phase flux-lock type SFCL showed the different fault current limiting characteristics from the separated three-phase flux-lock type SFCL that the fault phase could affect the sound phase, which resulted in quench of the HTSC element in the sound phase. Through the computer simulation applying numerical analysis for its three-phase equivalent circuit, the fault current limiting characteristics of the separated and the integrated three-phase flux-lock type SFCLs according to the ground fault types were compared.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.2
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• pp.46-52
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• 2014

This paper presents a multiple gain controlled digital phase and frequency detector with a fast lock-time. Lock-time of the digital PLL can be significantly reduced by applying proposed adaptive gain control technique. A loop gain of the proposed digital PLL is controlled by three conditions that are very large phase difference between reference and feedback signal, small phase difference and before lock-state, and after lock-state. The simulation result shows that lock-time of the proposed multiple gain controlled digital PLL is 100 times faster than that of the conventional structure with unit gain mode.

• Journal of electromagnetic engineering and science
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• v.11 no.2
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• pp.105-112
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• 2011

In phase-locked frequency synthesizers, a fast-lock technique is frequently employed to overcome the trade-off between a lock-time and a spurious response. The function of fast-lock in a conventional PLL (Phased Lock Loop) IC (Integrated Circuit) is limited by a factor of 16, which is usually implemented by a scaling of charge pumper, and consequently a lock time improvement of a factor of 4 is possible using the conventional PLL IC. In this paper, we propose a novel external active fast-lock loop filter. The proposed loop filter provides, conceptually, an unlimited scaling of charge pumper current, and can overcome conventional trade-off between lock-time and spur suppression. To demonstrate the validity of our proposed loop-filter, we fabricated an X-band frequency synthesizer using the proposed loop filter. The loop filter in the synthesizer is designed to have a loop bandwidth of 100 kHz in the fast-lock mode and a loop bandwidth of 5 kHz in the normal mode, which corresponds to a charge pumper current change ratio of 400. The X-band synthesizer shows successful performance of a lock-time of below 10 ${\mu}sec$ and reference spur suppression below -64 dBc.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.12 no.3
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• pp.22-28
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• 1998

It is required to automate a manufacturing industry of a glasses frame, because of the inaccuracy in assembly and shortage of labor. So, in this paper, rim-lock electric welding system has been developed in order to automate a electric welding process and to increase welding quality. Rim-lock electric welding system consists of circular and linear feeder, holder for welding rim and lock, and the equipment for silver-lead provision and so forth. Main controller is a V55 microprocessor which is easy to be expanded into other function. Control program is programed using 'C' language which is easier than other language in coding, modification and adding function. At the practical welding that Rim-Lock electric welding system from this study is used, we can get such advantages as uniform quality of electric welding, continuous operation and improved productivity.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.34 no.4
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• pp.651-666
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• 2024

Android devices employ lock screens with various authentication methods to protect user data. However, even with the lock screen active, the device can be accessed via the Android Debug Bridge(ADB), a powerful development tool that controls devices connected through USB. In this paper, we explore methods to bypass the lock screen security mechanism by leveraging the characteristics of ADB. To achieve this, we analyze ADB commands to categorize those that can severely impact the Android system and propose LockPickFuzzer, a fuzzing test tool that automatically explores ways to combine these commands to disable lock screen security. To demonstrate LockPickFuzzer's ability to detect security vulnerabilities using ADB, we conducted experiments on the Galaxy S23 and Pixel 8, both running Android 14. The results revealed two ADB command combinations that could either steal authentication information or bypass the lock screen. We submitted a report on these discovered vulnerabilities to the Samsung security team and received official acknowledgment (SVE-2023-1344) from Samsung Electronics for one ADB command combination that can be reproduced on user devices. LockPickFuzzer is a practical tool that operates automatically without user intervention and is expected to contribute to the effective detection of security vulnerabilities caused by ADB command combinations on Android devices.

• Journal of the Korea Institute of Military Science and Technology
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• v.2 no.1
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• pp.139-149
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• 1999

In this paper, we estimate the scale factor error and random walk characteristics of the ring laser gyro which has the body dither for Lock-in compensation. And then, we compared those results with the static test results for 28cm square ring laser gyro which has about 0.5 deg/sec static Lock-in. In the case of sinusoidal body dither, dynamic Lock-in occurs periodically at the points where the gyro output pulse becomes the integer multiples of body dither frequency. The width of dynamic Lock-in is changed by variation of dither amplitude, and, between the width of dynamic Lock-in which occurs at the even multiple points of body dither frequency and that at the odd muliple points of body dither frequency, it has 180o phase difference. Generally random body dither is adopted to compensate for dynamic Lock-in. Then if the irregularity is not large enough, the scale factor error by dynamic Lock-in is not vanished. And if the irregularity is large enough, the scale factor error decreases, but random walk becomes larger relatively. And we confirmed that the larger body dither amplitude, the smaller random walk.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.9
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• pp.1582-1589
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• 2006

A lock mechanism is essential for synchronization on the multiprocessor systems. The conventional queuing lock has two bus traffics that are the initial and retry of the lock-read. %is paper proposes the new locking protocol, called WPV (Waiting Processor Variable) lock mechanism, which has only one lock-read bus traffic command. The WPV mechanism accesses the shared data in the initial lock-read phase that is held in the pipelined protocol until the shared data is transferred. The nv mechanism also uses the cache state lock mechanism to reduce the locking overhead and guarantees the FIFO lock operations in the multiple lock contentions. In this paper, we also derive the analytical model of WPV lock mechanism as well as conventional memory and cache queuing lock mechanisms. The simulation results on the WPV lock mechanism show that about 50% of access time is reduced comparing with the conventional queuing lock mechanism.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.8
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• pp.689-693
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• 2009

We investigate the comparison of fault current characteristics between the separates three-phase flux-lock type superconducting fault current limiter(SFCL) and integrated three-phase flux-lock type superconducting fault current limiter(SFCL). The single-phase flux-lock type SFCL consists of two coils. The primary coil is wound in parallel to the secondary coil on an iron core and superconducting elements are connected to secondary coil in series. Superconducting elements are used by the YBCO coated conductor. The separated three-phase flux-lock type SFCL consists of single-phase flux-phase type SFCL in each phase. But the integrated three-phase flux-lock type SFCL consists of three-phase flux-reactors wound on an iron core. Flux-reactor consists of the same turn's ratio between coil 1 and coil 2 for each single phase. To compare the current limiting characteristics of the separated three-phase flux-lock type SFCL and integrated three-phase flux-lock type SFCL, the short circuit experiments are carried out fault condition such as the single line-to-ground fault. The experimental result shows that fault current limiting characteristic of the separated three-phase flux-lock type SFCL was better than integrated three-phase flux-lock type SFCL. And the integrated three-phase flux-lock type SFCL has an effect on sound phase.

• Journal of the Korea Convergence Society
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• v.9 no.7
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• pp.9-16
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• 2018

The purpose of this study is to prevent the malicious user from breaking the door-lock due to physical impact. If it matches the analog displacement value set in the door-lock system, it protects the body and property by transmitting damage information in real time to the manager smart phone. The research suggests a system that transmits damage information in real time to registered users when door-lock is damaged by physical impact. Then compare the impact information sensed by the door lock with the data of the sensitivity control unit. In the web server of the proposed system, after impact information transmitted from Door-Lock is stored in the DB, if the impact information is larger than the shock detection transmission reference value stored in the DB, it is transmitted to the administrator in real time by SMS module so that illegal access information.