• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.8 no.6
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• pp.558-567
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• 1997

Linear power amplifier modules with high-efficiency have been developed for PCS handy phone. These modules were designed using extracted large-signal models of MESFETs and harmonic balance simulation. The modules are intended for low-tier and high-tier at the operation frequency range of 1750 ~ 1780 MHz. For low-tier module, the output power and $IMD_3$ were 23.2 dBm and 31 dBc, respectively, at power-added efficiency of 34% with the supply drain bias of 3.6 V. For high-tier module, the output power and $IMD_3$ were 272.2 dBm and 31 dBc, respectively, at power-added efficiency of 33% with the supply drain bias of 4.2 V. These linear power amplifier modules are suitable for PCS handy phone.

• ETRI Journal
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• v.36 no.2
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• pp.214-223
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• 2014

A fully-integrated penta-band reconfigurable power amplifier (PA) is developed for handset Tx applications. The output structure of the proposed PA is composed of the fixed output matching network, power and frequency reconfigurable networks, and post-PA distribution switches. In this work, a new reconfiguration technique is proposed for a specific band requiring power and frequency reconfiguration simultaneously. The design parameters for the proposed reconfiguration are newly derived and applied to the PA. To reduce the module size, the switches of reconfigurable output networks and post-PA switches are integrated into a single IC using a $0.18{\mu}m$ silicon-on-insulator CMOS process, and a compact size of $5mm{\times}5mm$ is thus achieved. The fabricated W-CDMA PA module shows adjacent channel leakage ratios better than -39 dBc up to the rated linear power and power-added efficiencies of higher than around 38% at the maximum linear output power over all the bands. Efficiency degradation is limited to 2.5% to 3% compared to the single-band reference PA.

• Journal of electromagnetic engineering and science
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• v.14 no.2
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• pp.68-73
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• 2014

A linear stacked field-effect transistor (FET) power amplifier (PA) is implemented using a $0.18-{\mu}m$ silicon-on-insulator CMOS process for W-CDMA handset applications. Phase distortion by the nonlinear gate-source capacitance ($C_{gs}$) of the common-source transistor, which is one of the major nonlinear sources for intermodulation distortion, is compensated by employing a PMOS linearizer with improved AM-PM. The linearizer is used at the gate of the driver-stage instead of main-stage transistor, thereby avoiding excessive capacitance loading while compensating the AM-PM distortions of both stages. The fabricated 836.5 MHz linear PA module shows an adjacent channel leakage ratio better than -40 dBc up to the rated linear output power of 27.1 dBm, and power-added efficiency of 45.6% at 27.1 dBm without digital pre-distortion.

• The Journal of Information Technology
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• v.10 no.3
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• pp.47-58
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• 2007

In this paper, we designed and manufactured the distortion-cancellation module which is able to compensate thermal-noise distortion by software. The distortion-cancellation algorithm not only bring forth system non-linear distortion by input level but also bring compensate component of distortion by thermal to get rid off distortion from now on. After TMS 320C6711 DSP to recognize our algorithm, we manufactured the module for every kinds of system. To evaluate efficiency of the distortion-cancellation module, we designed and manufactured communication system. By measured result, if system output power is -3dBm equally, 12dB of ACLR has improved in 1MHz away from a center frequency, and also gain has increased up to 0.5dB.

• Journal of electromagnetic engineering and science
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• v.16 no.4
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• pp.241-247
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• 2016

This paper proposes the design and measurement of a 6-18 GHz front-end receiver module that has been combined into a one- channel output from a two-channel input for electronic warfare support measures (ESM) applications. This module includes a limiter, high-pass filter (HPF), power combiner, equalizer and amplifier. This paper focuses on the design aspects of reducing the noise figure (NF) and matching the phase and amplitude. The NF, linear equalizer, power divider, and HPF were considered in the design. A broadband receiver based on a combined configuration used to obtain low NF. We verify that our receiver module improves the noise figure by as much as 0.78 dB over measured data with a maximum of 5.54 dB over a 6-18 GHz bandwidth; the difference value of phase matching is within $7^{\circ}$ between ports.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.4
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• pp.430-439
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• 2011

In this paper, we design a digital predistortion(DPD) for linearity enhancement of RF power amplifier operating in 900 MHz band. We verify improvement of linearity by comparing the proposed DPD using tanh as a nonlinear indexing function and the DPD using linear indexing function based on signal amplitude. The digital predistortion is realized by look-up table(LUT) method, and the Saleh model is employed for power amplifier modeling, then a commercial power amplifier module is used for measurement. The LUT has 256 tables, and the NLMS(Normalized Least Mean Square) algorithm was utilized for an adaptive algorithm for estimation. As a result, we improve the ACLR(Adjacent Channel Leakage Ratio) by around 15 dB.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.4
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• pp.484-490
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• 2012

In this paper, we design a digitally pre-distorted RF power amplifier operating in 900 MHz band. The linearity of RF power amplifier is improved by employing the digital pre-distortion(DPD) based on affine projection(AP) algorithm, where the look-up table(LUT) method is used with non-linear indexing. The proposed DPD with AP algorithm is compared with that with normalized least mean square(NLMS) algorithm, applied to the RF power amplifier. A commercial power amplifier module is used for verification of the proposed algorithm which shows improvement of adjacent channel leakage ratio(ACLR) by about 21 dB.

• ETRI Journal
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• v.46 no.4
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• pp.708-715
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• 2024

We propose a 10-GHz 2 × 2 phased-array radio frequency (RF) receiver with an 8-bit linear phase and 15-dB gain control range using 65-nm complementary metal-oxide-semiconductor technology. An 8 × 8 phased-array receiver module is implemented using 16 2 × 2 RF phased-array integrated circuits. The receiver chip has four single-to-differential low-noise amplifier and gain-controlled phase-shifter (GCPS) channels, four channel combiners, and a 50-Ω driver. Using a novel complementary bias technique in a phase-shifting core circuit and an equivalent resistance-controlled resistor-inductor-capacitor load, the GCPS based on vector-sum structure increases the phase resolution with weighting-factor controllability, enabling the vector-sum phase-shifting circuit to require a low current and small area due to its small 1.2-V supply. The 2 × 2 phased-array RF receiver chip has a power gain of 21 dB per channel and a 5.7-dB maximum single-channel noise-figure gain. The chip shows 8-bit phase states with a 2.39° root mean-square (RMS) phase error and a 0.4-dB RMS gain error with a 15-dB gain control range for a 2.5° RMS phase error over the 10 to10.5-GHz band.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.4
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• pp.308-315
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• 2018

In this paper, we present the basic design results for high-resolution radar development at S-band frequency that can precisely measure the miss distance between two targets. The basic system requirement is proposed for the design of a 3.5 GHz linear frequency-modulated (LFM) radar with maximum detection distance and distance resolution of 2 km and 1 m, respectively, and the specifications of each module are determined using the radar equation. Our calculations revealed a signal-to-noise ratio ${\geq}30dB$ with a bandwidth of 150 MHz, transmission power of 43 dBm for the power amplifier, gain of 26 dBi for the antenna, noise figure of 8 dB, and radar cross-section of $1m^2$ at a target distance of 2 km from the radar. Based on the calculation results and the theory and method of LFM radar design, the hardware was designed using software defined radar technology. The results of the subsequent field test are presented that prove that the designed radar system satisfies the requirements.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.9
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• pp.2362-2372
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• 1996

This paper deals with the design and development of an Injection-Locking Coupled Oscillators(ILCO), which functions like phase-shifter in the Active Intergrated Phased Array Antenna(AIPAA). This linear array 2-element ILCO consists of two Injection Locking Hair-pin Resonator Oscillators(ILHRO) and an unilateral amplifier. The first and second elements of the ILCO have same frequency tuning range but locking bandwidths of 11.5MHz and 14MHz respectively. A phase shift of .DELTA..PHI.=158.4.deg.(-78.0.deg. to 80.4.deg.) could be obtained inthe second element of ILCO when the first elementof the ILCO was in the reference locking mode(.DELTA..PHI.=0.deg.). When the ILCO is applied to the AIPAA, the predicted beam scanning angle value will be 38.4.deg.. Each ILCO gives good frequency stability and lower AM, FM, and PM noise charactheristics in the mutual coupling lockingmode. The ILCO can not only play a part as the phase shifter for the AIPAA but it can also be usedas the power combining device in the mm-wave frequency range and as a part of a T/R MMIC module.