• Title/Summary/Keyword: leakage power suppression

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Leakage Magnetic Field Suppression Using Dual-Transmitter Topology in EV Wireless Charging

  • Zhu, Guodong;Gao, Dawei;Lin, Shulin
    • Journal of Power Electronics
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    • v.19 no.3
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    • pp.625-636
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    • 2019
  • This paper proposes an active leakage magnetic field (LMF) suppression scheme, which uses the dual-transmitter (DT) topology, for EV wireless charging systems (EVWCS). The two transmitter coils are coplanar, concentric and driven by separate inverters. The LMF components generated by the three coils cancel each other out to reduce the total field strength. This paper gives a detailed theoretical analysis on the operating principles of the proposed scheme. Finite element analysis is used to simulate the LMF distribution patterns. Experimental results show that when there is no coil misalignment, 97% of the LMF strength can be suppressed in a 1kW prototype. These results also show that the impact on efficiency is small. The trade-off between LMF suppression and efficiency is revealed, and a control strategy to balance these two objectives is presented.

High Output Power and High Fundamental Leakage Suppression Frequency Doubler MMIC for E-Band Transceiver

  • Chang, Dong-Pil;Yom, In-Bok
    • Journal of electromagnetic engineering and science
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    • v.14 no.4
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    • pp.342-345
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    • 2014
  • An active frequency doubler monolithic microwave integrated circuit (MMIC) for E-band transceiver applications is presented in this letter. This MMIC has been fabricated in a commercial $0.1-{\mu}m$ GaAs pseudomorphic high electron mobility transistor (pHEMT) process on a 2-mil thick substrate wafer. The fabricated MMIC chip has been measured to have a high output power performance of over 13 dBm with a high fundamental leakage suppression of more than 38 dBc in the frequency range of 71 to 86 GHz under an input signal condition of 10 dBm. A microstrip coupled line is used at the output circuit of the doubler section to implement impedance matching and simultaneously enhance the fundamental leakage suppression. The fabricated chip is has a size of $2.5mm{\times}1.2mm$.

Suppression of Leakage Current and Distortion in Variable Capacitance Devices and their Application to AC Power Regulators

  • Katsuki, Akihiko;Oki, Takuya
    • Journal of Power Electronics
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    • v.16 no.1
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    • pp.66-73
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    • 2016
  • The quantity of alternating current (AC) leakage and the value of distortion factor in capacitor currents are discussed with regard to a new power component called variable capacitance device (VCD). This component has terminals for controlling its capacitance. Nonlinear dielectric characteristics are utilized in this device to vary the capacitance. When VCD operates in an AC circuit, the AC leakage from this device through direct current (DC) control voltage source increases according to the conditions of DC control voltage and so on. To solve this problem, we propose techniques for suppressing AC leakage. Although VCD has strong nonlinear characteristics, the current through the capacitor is not distorted significantly. The relations between AC leakage and the distortion in current waveforms are investigated. An application example for an AC power regulator is also introduced to evaluate the distortion in waveforms.

Leakage-Suppressed SRAM with Dynamic Power Saving Scheme for Future Sub-70-nm CMOS Technology (70-nm 이하 급 초미세 CMOS 공정에서의 누설 전류 및 동적 전류 소비 억제 내장형 SRAM 설계)

  • CHOI Hun-Dae;CHOI Hyun Young;KIM Dong Myeong;KIM Daejeong;MIN Kyeung-Sik
    • Proceedings of the IEEK Conference
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    • 2004.06b
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    • pp.343-346
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    • 2004
  • This paper proposes a leakage-suppressed SRAM with dynamic power saying scheme for the future leakage-dominant sub-70-nm technology. By dynamically controlling the common source-line voltage ($V_{SL}$) of sleep cells, the sub-threshold leakage through these sleep cells can be reduced to be 1/10-1/100 due to the reverse body-bias effect, dram-induced barrier lowering (DIBL) and negative $V_{GS}$ effects. Moreover, the bit-ling leakage which mar introduce a fault during the read operation can be completely eliminated in this new SRAM. The dynamic $V_{SL}$ control can also reduce the bit-line swing during the write so that the dynamic power in write can be reduced. This new SRAM was fabricated in 0.35-${\mu}m$ CMOS process and more than $30\%$ of dynamic power saying is experimentally verified in the measurement. The leakage suppression scheme is expected to be able to reduce more than $90\%$ of total SRAM power in the future leakage-dominant 70-nm process.

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Suppression of high frequency leakage current in PWM Inverter-Fed Induction Motor Drives using Active Common Mode Voltage Damper (능동형 커먼 모드 전압 감쇄기를 통한 유도 전동기의 고주파 누설전류 억제)

  • 홍순일
    • Proceedings of the KIPE Conference
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    • 2000.07a
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    • pp.186-190
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    • 2000
  • This paper propose a "Active common-mode voltage damper circuit" that capable of a suppression of a common-mode voltage produced in the PWM VSI. The four level half-bridge PWM inverter circuit and common-mode transformer are incorporated into the "Active common-mode voltage damper" the design method of which is presented Effect of "Active common-mode voltage damper" in this paper verifies a propriety and effectiveness in 2.2[kW] induction motor drive using IGBT inverter. Experimental results show that "common-mode voltage damper" makes contributions to reducing a high frequency leakage current and common-mode voltage.leakage current and common-mode voltage.

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MTCMOS Post-Mask Performance Enhancement

  • Kim, Kyo-Sun;Won, Hyo-Sig;Jeong, Kwang-Ok
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.4 no.4
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    • pp.263-268
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    • 2004
  • In this paper, we motivate the post-mask performance enhancement technique combined with the Multi-Threshold Voltage CMOS (MTCMOS) leakage current suppression technology, and integrate the new design issues related to the MTCMOS technology into the ASIC design methodology. The issues include short-circuit current and sneak leakage current prevention. Towards validating the proposed techniques, a Personal Digital Assistant (PDA) processor has been implemented using the methodology, and a 0.18um process. The fabricated PDA processor operates at 333MHz which has been improved about 23% at no additional cost of redesign and masks, and consumes about 2uW of standby mode leakage power which could have been three orders of magnitude larger if the MTCMOS technology was not applied.

The suppression of high frequency leakage current using a new active Common Mode Voltage Damper (새로운 능동형 커먼 모드 전압 감쇄기를 이용한 고주파 누설전류 억제)

  • Gu Jeong-Hoi;Bin Jae-Goo;Park Sung-Jun;Kim Cheul-U
    • Proceedings of the KIPE Conference
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    • 2001.07a
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    • pp.151-154
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    • 2001
  • This paper propose a new active common-mode voltage damper circuit that is capable of suppressing a common-mode voltage produced in the PWM VSI. The new active common mode voltage damper is consisted of a half-bridge inverter and a common mode transformer with a blocking capacitor. Principle of the active common mode damper is as follow; by applying the compensation voltage which has the same amplitude and opposite polarity to the PWM inverter system. So, common mode voltage and high frequency leakage current can be reduced. Simulated and experimental results show that common-mode voltage damper makes contributions to reducing a high frequency leakage current and common-mode voltage.

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A Leakage-Based Solution for Interference Alignment in MIMO Interference Channel Networks

  • Shrestha, Robin;Bae, Insan;Kim, Jae Moung
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.8 no.2
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    • pp.424-442
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    • 2014
  • Most recent research on iterative solutions for interference alignment (IA) presents solutions assuming channel reciprocity based on the suppression of interference from undesired sources by using an appropriate decoding matrix also known as a receiver combining matrix for multiple input multiple output (MIMO) interference channel networks and reciprocal networks. In this paper, we present an alternative solution for IA by designing precoding and decoding matrices based on the concept of signal leakage (the measure of signal power that leaks to unintended users) on each transmit side. We propose an iterative algorithm for an IA solution based on maximization of the signal-to-leakage-and-noise ratio (SLNR) of the transmitted signal from each transmitter. In order to make an algorithm removing the requirement of channel reciprocity, we deploy maximization of the signal-to-interference-and-noise ratio (SINR) in the design of the decoding matrices. We show through simulation that minimizing the leakage in each transmission can help achieve enhanced performance in terms of aggregate sum capacity in the system.

Low-cycle Fatigue Behaviors of the Steel Pipe Tee of a Nuclear Power Plant Using Image Signals (이미지 신호를 이용한 원자력발전소 강재배관 Tee의 저주기 피로 거동)

  • Kim, Sung-Wan;Jeon, Bub-Gyu;Cheung, Jin-Hwan;Kim, Seong-Do
    • Journal of the Korea institute for structural maintenance and inspection
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    • v.23 no.6
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    • pp.77-83
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    • 2019
  • Upon installing a seismic isolation device on a nuclear power plant, the device takes on the suppression of seismic loads. This is expected to bring about a larger displacement than what is seen prior to the installation of the seismic isolation device. Depending on the displacement change, the seismic risk for some equipment can increase. Particularly in case of the piping system, which is used for connecting the structure isolated from seismic events with common structures, the seismic risk is expected to rise significantly. In this study, the limit state of the steel pipe tee, which is a vulnerability part of the nuclear power plant piping system, was defined as leakage, and an in-plane cyclic loading test was conducted. As it is difficult to measure the moment and rotation of the steel pipe tee using the conventional sensors, an image signal was used. This study proposed a leakage line and low-cycle fatigue curves using the relationship between the moment and the rotation of a 3-inch steel pipe tee.

Leakage Localization with an Acoustic Array that Covers a Wide Area for Pipeline Leakage Monitoring in a Closed Space (닫힌 공간에서의 광역배관 누출 감시를 위한 배열센서를 이용한 누설 위치 검출)

  • Park, Choon-Su;Jeon, Jong-Hoon;Park, Jin-Ho
    • Journal of the Korean Society for Nondestructive Testing
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    • v.33 no.5
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    • pp.422-429
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    • 2013
  • It is of great importance to localize leakages in complex pipelines for assuring their safety. A sensor array that can detect where leakages occur enables us to monitor a wide area with a relatively low cost. Beamforming is a fast and efficient algorithm to estimate where sources are, but it is generally made use of in free field condition. In practice, however, many pipelines are placed in a closed space for the purpose of safety and maintenance. This leads us to take reflected waves into account to the beamforming for interior leakage localization. Beam power distribution of reflected waves in a closed space is formulated, and spatial average is introduced to suppress the effect of reflected waves. Computer simulations and experiments ensure how the proposed method is effective to localize leakage in a closed space for structural health monitoring.