• Title/Summary/Keyword: layout algorithm

Search Result 356, Processing Time 0.031 seconds

Reduction of Structure-borne Noises in a Two-Dimensional Cavity using Optimal Treatment of Damping Materials (제진재의 최적배치를 통한 이차원 공동의 구조기인소음 저감)

  • Lee, Doo-Ho
    • Transactions of the Korean Society of Mechanical Engineers A
    • /
    • v.30 no.12 s.255
    • /
    • pp.1581-1587
    • /
    • 2006
  • An optimization formulation is proposed to minimize sound pressures in a two-dimensional cavity by controlling the attachment area of viscoelastic unconstrained damping materials. For the analysis of structural- acoustic systems, a hybrid approach that uses finite elements for structures and boundary elements for cavity is adopted. Four-parameter fractional derivative model is used to accurately represent dynamic characteristics of the viscoelastic materials with respect to frequency and temperature. Optimal layouts of the unconstrained damping layer on structural wall of cavity are identified according to temperatures and the amount of damping material by using a numerical search algorithm.

Computer Simulation for Analysis of Flexible Manufacturing Systems (자동생산시스템의 분석을 위한 컴퓨터 시뮬레이션)

  • Cho, Kyu-Kab;Oh, Soo-Cheol;Lee, Moon-Ok
    • Journal of the Korean Society for Precision Engineering
    • /
    • v.3 no.2
    • /
    • pp.76-90
    • /
    • 1986
  • This paper discusses the analysis of flexible manufacturing systmes design using computer simulation method. The simulation language employed is SIMAN which is a powerful tool to model flexible manufacturing systems. The important characteristics of FMS, its design and operational problems, and structures based on the number of NC machine tools and their layout are discussed for the appli- cations of FMS to manufacturing. A new algorithm for forming part families and machine groups has been proposed and its software is also developed. Simulation procedure using SIMAN for analysis of FMS designs is discussed and two design problems are analyzed and evaluated to illustrate systemstic procedure for analysis of FMS.

  • PDF

Effective layout of loudspeakers in a multichannel sound system for real time virtual sound reproduction (실시간 가상음장재현을 위한 멀티채널 시스템의 효과적인 스피커 배치)

  • Lee, Chan-Joo;Park, Young-Jin
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
    • /
    • 2000.11a
    • /
    • pp.455-461
    • /
    • 2000
  • A multichannel signal processing algorithm for generating real time virtual sound field was proposed. Evaluation of the system performance was done by an objective function that minimizes the difference between the real and generated signals at each control point. Since impulse responses at the surface of a rigid sphere show characteristics similar to those of real HRTF, a rigid sphere model was adequate to simulate the multichannel sound system. A two-channel system and two four-channel systems were studied with various combinations of source locations and speaker positions. The results show that a two-channel system has its best configuration when the angle spanned by the loudspeakers is less than $60^{\circ}$. In the case of four-channel systems, the overall performance was highly improved with one pair of speakers fixed at an optimal position. Left/right symmetry was a reasonable choice, but the additional front/back symmetry degraded the performance of system.

  • PDF

A Design and Implementation of Variable Reference Graph (Variable Reference Graph 의 설계 및 구현)

  • Lee, Heon-Ki;Lee, Mun-Su;Shin, Gyu-Sang
    • Proceedings of the Korea Information Processing Society Conference
    • /
    • 2000.04a
    • /
    • pp.815-820
    • /
    • 2000
  • Variable Reference Graph 는 C 언어로 작성된 프로그램으로부터 상호 절차적인 자료 흐름 분석 정보를 수평적 방향 그래프(directed graph)로 자동 생성해주는 역공학(reverse engineering) 도구들 중 하나이다. 본 논문에서는 판독성 있는 구조적 정보를 제공하기위한 그래픽 표현의 전략을 바탕으로 JAVA 로 구현된 그래픽 사용자 인터페이스(graphic user interface) 및 그래프 레이아웃 알고리즘(graph layout algorithm)을 기술한다. 이 알고리즘은 4 단계로 구성되어 있다: 정보 모형, 레벨 알고리즘, 순서 알고리즘, 위치 알고리즘. 각 단계별에서 수행되는 주요 알고리즘을 살펴 본다. 특히, 이 알고리즘들은 사이클(cycle) 및 비사이클(acyclic) 방향 그래프, 그리고 트리(tree)를 수평적 계층 구조를 생성하는데 사용될 수 있다. 본 논문에서 구현된 Variable Reference Graph 는 소프트웨어 재공학 도구를 개발하는 RESORT(RESearch on object-oriented SOftware Reengineering Technology) 과제에서 개발되었다.

  • PDF

Ni-Ti actuators and genetically optimized compliant ribs for an adaptive wing

  • Mirone, Giuseppe
    • Smart Structures and Systems
    • /
    • v.5 no.6
    • /
    • pp.645-662
    • /
    • 2009
  • Adaptive wings are capable of properly modifying their shape depending on the current aerodynamic conditions, in order to improve the overall performance of a flying vehicle. In this paper is presented the concept design of a small-scale compliant wing rib whose outline may be distorted in order to switch from an aerodynamic profile to another. The distortion loads are induced by shape memory alloy actuators placed within the frame of a wing section whose elastic response is predicted by the matrix method with beam formulation. Genetic optimization is used to find a wing rib structure (corresponding to the first airfoil) able to properly deforms itself when loaded by the SMA-induced forces, becoming as close as possible to the desired target shape (second airfoil). An experimental validation of the design procedure is also carried out with reference to a simplified structure layout.

A Study on Product Move Operation Optimal Path Based on Business Supporting System & Spatial Information (업무지원 시스템 및 공간정보 기반의 제품 이동 작업 경로 최적화 기법 연구)

  • Sung-il Park;Ik-Soo choi
    • Proceedings of the Korean Society of Computer Information Conference
    • /
    • 2023.07a
    • /
    • pp.555-556
    • /
    • 2023
  • 본 논문에서는 제조/물류 기업 등 제품(물품) 이동 작업 시 효율적인 경로 제공을 위한 경로 최적화 기법을 제안한다. 이 기법은 업무지원 시스템(MES, ERP, WMS 등)이 구축되어있는 기업을 대상으로 공간정보와 업무지원 시스템에 저장되는 제품 데이터를 기준 정보로 하며, 다익스트라(Dijkstra), 개미 집단 알고리즘(Ant Colony Algorithm, ACO)등 경로 탐색 알고리즘을 적용하여 문제를 해결하고자 한다. 공간정보는 공장(현장)의 레이아웃(Layout)과 제품이 적재/출하되는 렉(Rack) 등의 위치 정보가 포함되고, 업무지원 시스템에서 제품의 현재 위치, 공정 상태, 등록 시간, 제품 크기 등을 사용한다. 제안하는 기법은 상기 기준 정보를 경로 탐색 알고리즘에 적용하여 적재/출하, 공정 이동, 보관 장소 변경 등 제품의 위치가 변경되는 경우에 경로를 최적화할 수 있는 기법을 제안한다. 제품 이동 작업은 대부분 노동력에 의존하는 작업으로 경로 최적화 기법을 제안함으로써, 인력 비용 감소와 향후 로봇 기반의 제품 이동 작업에도 적용하여 자동화된 작업효과를 가져다 줄 것으로 기대한다.

  • PDF

Algorithm for Minimum Linear Arrangement(MinLA) of Binary Tree (이진트리의 최소선형배열 알고리즘)

  • Sang-Un Lee
    • The Journal of the Institute of Internet, Broadcasting and Communication
    • /
    • v.24 no.2
    • /
    • pp.99-104
    • /
    • 2024
  • In the deficiency of an exact solution yielding algorithm, approximate algorithms remain as a solely viable option to the Minimum Linear Arrangement(MinLA) problem of Binary tree. Despite repeated attempts by a number of algorithm on k = 10, only two of them have been successful in yielding the optimal solution of 3,696. This paper therefore proposes an algorithm of O(n) complexity that delivers the exact solution to the binary tree. The proposed algorithm firstly employs an In-order search method by which n = 2k - 1 number of nodes are assigned with a distinct number. Then it reassigns the number of all nodes that occur on level 2 ≤ 𝑙 ≤ k-2, (k = 5) and 2 ≤ 𝑙 ≤ k-3, (k = 6), including that of child of leaf node. When applied to k=5,6,7, the proposed algorithm has proven Chung[14]'s S(k)min=2k-1+4+S(k-1)min+2S(k-2)min conjecture and obtained a superior result. Moreover, on the contrary to existing algorithms, the proposed algorithm illustrates a detailed assignment method. Capable of expeditiously obtaining the optimal solution for the binary tree of k > 10, the proposed algorithm could replace the existing approximate algorithms.

A Small-Area Hardware Implementation of Hash Algorithm Standard HAS-160 (해쉬 알고리듬 표준 HAS-l60의 저면적 하드웨어 구현)

  • Kim, Hae-Ju;Jeon, Heung-Woo;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.14 no.3
    • /
    • pp.715-722
    • /
    • 2010
  • This paper describes a hardware design of hash function processor which implements Korean Hash Algorithm Standard HAS-160. The HAS-160 processor compresses a message with arbitrary lengths into a hash code with a fixed length of 160-bit. To achieve high-speed operation with small-area, arithmetic operation for step-operation is implemented by using a hybrid structure of 5:3 and 3:2 carry-save adders and carry-select adder. It computes a 160-bit hash code from a message block of 512 bits in 82 clock cycles, and has 312 Mbps throughput at 50 MHz@3.3-V clock frequency. The designed HAS-160 processor is verified by FPGA implementation, and it has 17,600 gates on a layout area of about $1\;mm^2$ using a 0.35-${\mu}m$ CMOS cell library.

The application of the combinatorial schemes for the layout design of Sensor Networks (센서 네트워크 구축에서의 Combinatorial 기법 적용)

  • Kim, Joon-Mo
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.45 no.7
    • /
    • pp.9-16
    • /
    • 2008
  • For the efficient routing on a Sensor Network, one may consider a deployment problem to interconnect the sensor nodes optimally. There is an analogous theoretic problem: the Steiner Tree problem of finding the tree that interconnects given points on a plane optimally. One may use the approximation algorithm for the problem to find out the deployment that interconnects the sensor nodes almost optimally. However, the Steiner Tree problem is to interconnect mathematical set of points on a Euclidean plane, and so involves particular cases that do not occur on Sensor Networks. Thus the approach of using the algorithm does not make a proper way of analysis. Differently from the randomly given locations of mathematical points on a Euclidean plane, the locations of sensors on Sensor Networks are assumed to be physically dispersed over some moderate distance with each other. By designing an approximation algorithm for the Sensor Networks in terms of that physical property, one may produce the execution time and the approximation ratio to the optimality that are appropriate for the problem of interconnecting Sensor Networks.

Algorithm for a Minimum Linear Arrangement(MinLA) of Lattice Graph (격자 그래프의 최소선형배열 알고리즘)

  • Sang-Un Lee
    • The Journal of the Institute of Internet, Broadcasting and Communication
    • /
    • v.24 no.2
    • /
    • pp.105-111
    • /
    • 2024
  • This paper deals with the minimum linear arrangement(MinLA) of a lattice graph, to which an approximate algorithm of linear complexity O(n) remains as a viable solution, deriving the optimal MinLA of 31,680 for 33×33 lattice. This paper proposes a partitioning arrangement algorithm of complexity O(1) that delivers exact solution to the minimum linear arrangement. The proposed partitioning arrangement algorithm could be seen as loading boxes into a container. It firstly partitions m rows into r1,r2,r3 and n columns into c1,c2,c3, only to obtain 7 containers. Containers are partitioning with a rule. It finally assigns numbers to vertices in each of the partitioned boxes location-wise so as to obtain the MinLA. Given m,n≥11, the size of boxes C2,C4,C6 is increased by 2 until an increase in the MinLA is detected. This process repeats itself 4 times at maximum given m,n≤100. When tested to lattice in the range of 2≤n≤100, the proposed algorithm has proved its universal applicability to lattices of both m=n and m≠n. It has also obtained optimal results for 33×33 and 100×100 lattices superior to those obtained by existing algorithms. The minimum linear arrangement algorithm proposed in this paper, with its simplicity and outstanding performance, could therefore be also applied to the field of Very Large Scale Integration circuit where m,n are infinitely large.