• 한국원자력학회:학술대회논문집
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• 한국원자력학회 1997년도 춘계학술발표회논문집(1)
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• pp.153-158
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• 1997

This paper describes a formal safety analysis technique which is demonstrated by performing empirical formal safety analysis with the case study of beamline hutch door Interlock system that is developed by using PLC(Programmable Logic Controller) systems at the Pohang Accelerator Laboratory. In order to perform formal safety analysis, we have built the Z formal specifications representation from user requirement written in ambiguous natural language and target PLC ladder logic, respectively. We have also studied the effective method to express typical PLC timer component by using specific Z formal notation which is supported by temporal history. We present a formal proof technique specifying and verifying that the hazardous states are not introduced into ladder logic in the PLC-based safety critical system.

• 간호행정학회지
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• 제16권3호
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• pp.314-325
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• 2010

Purpose: The purpose of this study was to investigate how nurses perceive the Career Ladder System(CLS). Methods: This study was a descriptive survey using questionnaires. Questionnaires were developed by an expert group. Participants included 161 nurses working in the Children's Hospital. The data were analyzed using factor analysis, Cronbach's alpha, descriptive statistics, $x^2$-test and ANCOVA. Results: This study revealed that nurses who advanced in their career ladders have a significantly higher perception of participation in their professional activities and a general comprehension of the CLS more than the nurses who did not advance in their career ladders. However, nurses who advanced in their career ladders have a significantly lower perception of the expected outcome of the CLS more than nurses who did not. Conclusions: This result showed that nurses who had experienced in clinical advancement and recognition were highly motivated with their professional activities via the CLS as well as they considered it to allow professional growth.

• Korean Journal of Mathematics
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• 제25권2호
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• pp.181-199
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• 2017

In this paper we consider the orthogonal polynomials with weights ${\omega}_{\alpha}(x)=x^{\alpha}{\exp}(-x^3+tx)$ and $W_{\alpha}(x)={\mid}x{\mid}^{2{\alpha}+1}{\exp}(-x^6+tx^2)$. Using the compatibility conditions for the ladder operators for these orthogonal polynomials, we derive several difference equations satisfied by the recurrence coefficients of these orthogonal polynomials. We also derive differential-difference equations and second order linear ordinary differential equations satisfied by these orthogonal polynomials.

• 한국정보과학회논문지:소프트웨어및응용
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• 제37권1호
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• pp.54-59
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• 2010

산업자동화 분야에는 특수목적 마이크로콘트롤러인 PLC가 널리 사용된다. PLC 프로그램 분석과 검증을 위한 연구에서 우선적으로 해야 할 일은 PLC 프로그래밍 언어의 의미구조를 정형적으로 제시하는 것이다. 본 논문은 PLC 프로그래밍에 널리 사용하는 LD 언어의 의미구조를 정의한다. LD 언어는 그래픽 언어이기 때문에 먼저 텍스트 언어 Symbolic LD로 구문구조를 정형화한 다음에, Symbolic LD에 대한 의미구조를 정의할 수가 있다. 본 논문은 Symbolic LD의 의미구조를 자연 의미구조 기법으로 정의하고, 증명 보조기 Coq을 이용하여 정형화하였다.

• 대한전기학회논문지
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• 제40권8호
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• pp.836-844
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• 1991

PLC(programmable logic controller) system is widely used for the control of factory. PLC system receives ladder diagram which is drawn by the user to implement hardware logic, converts the ladder diagram into sequence program which is executable in the PLC system, and executes the sequence program indefinitely unless user breaks. The sequence program processes the data of on/off signal, and endures 1 scan delay and missing of pulse-type signal shorter than a scan time. So, data dependency doesn't exist. By applying theis characteristics to multiprocessor architecture, we design parellel PLC functionally and evaluate performance upgrade. Parallel PLC consists of central processing module, N general processing unit, and a shared memory by master-slave type. Each module executes allocated sequence program by the control of central processing module. We can expect performance upgrade by parallel processing, and reliability by relocation of sequence program when error occurs in processing module.

• Transactions on Electrical and Electronic Materials
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• 제4권3호
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• pp.5-9
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• 2003

In this paper, a layout-based CMOS RF model for RFIC's including the capacitance effect, the skin effect, and the proximity effect between metal lines on the Si surface is proposed for the first time for accurately predicting the RF behavior of CMOS devices. With these RF effects, the RF equivalent circuit model based on the layout of the multi-finger gate transistor is presented. The capacitances between metal lines on the Si surface are modeled with the layout. And the skin effect is modeled to the equivalent ladder circuit of metal line. The proximity effect is modeled by adding the mutual inductance between cross-coupled inductances in the ladder circuit representation. Compared to the BSIM 3v3 and other models, the proposed RF model shows better agreements with the measured data and shows well the frequency dependent behavior of devices in GHz ranges.

• 제어로봇시스템학회논문지
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• 제8권8호
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• pp.706-712
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• 2002

In general, a deadlock in flexible manufacturing systems (FMSs) is caused by a resource limitation and the diversity of routings. However, the deadlock of industrial controllers such as programmable logic controllers (PLCs) can occur from different causes compared with those in general FMSs. The deadlock of PLCs is usually caused by an error signal between PLCs and manufacturing systems. In this paper, we propose a deadlock detection and recovery (DDR) algorithm to resolve the deadlock problem of PLCs at design stage. This paper employs the MAPN (modified automation Petri net), MTPL (modified token passing logic), and ECC (efficient code conversion) algorithm to model manufacturing systems and to convert a Petri net model into a desired LD (ladder diagram). Finally, an example of manufacturing systems is provided to illustrate the proposed DDR algorithm.

• 전자공학회논문지C
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• 제34C권5호
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• pp.33-42
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• 1997

In this paper, the modified inverse chebyshev low-pass function is analyzed in the frequency domain, time domain, and sensitivity characteristics as compared with the classical inverse chebyshev function. Unlike the classical function, the modified function exhibits progressively diminishing ripples in the stopband. So, the modified function has a great attenuation throughout the stopband except at the vicinity of a stop frequency and can be realizable in the passive doubly-terminated ladder network for the even order. The poles of the modified function move towards real axis by the effect of diminishing ripples. Thus the pole-Q, which is one of the valuable measurements to estimage the function characteristics, is reduced without increasing order. In the frequency and can be realizable in the passive doubly-terminated ladder network to examine the magnitude and pole-Q sensitivities.

• 전자공학회논문지B
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• 제32B권12호
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• pp.1572-1580
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• 1995

In this paper, a modified Chebyshev low-pass filter function is proposed. The modified Chebyshev filter function exhibits ripples diminishing toward .omega. = 0 in the passband. So, the modified filter function is realizable in the passive doubly-terminated ladder network for the order n even or odd, thus lending itself amenable to active RC or switched capacitor filters through the simulation techniques. Besides the passive doubly-terminated ladder realizability, lower pole-Q values of the modified function are accountable for improved phase and delay characteristics, as compared to classical function. We have designed the 6th order passive doubly-terminated network using the modified function. And then a continuous-time DDA(Differential Difference Amplifier) filter, which has no matching requirement, is realized by leap-frog simulation technique for fabrication. In the HSPICE simulation results, we confirmed that the designed continuous-time DDA filter characteristics are agreement with the passive filter.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(1)
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• pp.245-248
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• 2001

In this paper, we have investigated the design technique and fabricated the surface acoustic wave (SAW) filter for duplexer, which consists of Tx. and Rx. filter, and antenna terminal. For Tx. and Rx. bandpass filters we used the one-port SAW resonators with n-section ladder structure. The structure is composed of couples of series-arm resonators and parallel-arm resonators. RF filter using ladder structure was designed and fabricated on 36$^{\circ}$Y-X LiTaO$_3$ substrates. Designed filters, insertion loss is less than 1.5dB, the bandwidth is more than 25MHz, rejection band level is less than -30dB and center frequency is 820MHz.