• Korean Journal of Oriental Medicine
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• v.15 no.1
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• pp.31-42
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• 2009

Reprints of Dongeuibogam were made in 1659 in Daegu and once again in 1754 in Yeongyeong, Daegu. In 1814, it was republished in Wanyeong. These block books were officially released by government authorities while various reprints and copies were utilized by civilians. Also, Dongeuibogam was published several times for use in Japan and China. The National Library of Korea utilizes Dongeuibogam in a total of 401 types including 248 general books, 104 academic papers, 32 non-books and 17 old books. This can be classified by theme into 235 general theories, 23 medicinal prescriptions, 24 preservations and 13 drugs. Although the key to traditional medicine lies in its many years of experience, it is important to absorb the technical aspects of western medicine instead of relying on past experience alone.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.55 no.2
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• pp.76-84
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• 2006

Interstate electric power system, as an alternative for energy cooperation under regional economic block, has been hotly debated before progressing the restructure in electric power industry and rapidly expanded in many regions after 1990s. Especially, since northeast asia has strong supplementation in resource, load shape, fuel mix etc., interconnection of electric power systems in this region may bring considerable economic benefits. This paper implements a mathematical optimization model, ORIRES, proposed by Russia, in analysing the economic feasibility of system interconnection. Additional analyses on the environmental impact of the system interconnection, and sensitivity of key factor inputs have been performed.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.281-284
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• 2002

Rijndael algorithm is known to a new private key block cipher which is substitute for DES. Rijndael algorithm is adequate to both hardware and software implementation, so hardware implementation of Rijndael algorithm is applied to high speed data encryption and decryption. This paper describes three implementation methods of Rijndael S-box, which is important factor in performance of Rijndael coprocessor. It shows synthesis results of each S-box implementation in Xilinx FPGA. Tllc lilree S-box implementation methods are implementation using lookup table only, implementation using both lookup table and combinational logic, and implementation using combinational logic only.

• Journal of the Semiconductor & Display Technology
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• v.9 no.1
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• pp.1-4
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• 2010

We investigated a linear carbon nanotube motor serving as the key building block for nano-scale motion control by using molecular dynamics simulations. This linear nano-motor, is based on the electrostatically telescoping multi-walled carbon-nanotube with ultralow intershell sliding friction, is controlled by the gate potential with the capacitance feedback sensing. The resonant harmonic peaks are induced by the interference between the driving frequencies and its self-frequency. The temperature is very important factor to operate this nanomotor.

• Proceedings of the KSPS conference
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• 2006.05a
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• pp.109-112
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• 2006

This study investigated the acoustical characteristics of phonatory offset-onset mechanisms. And this study shows the comparative results between non-stutterers (N=3) and a stutterer (N=1). Phonatory offset-onset means a laryngeal articulatory in the connected speech. In the phonetic context V_V), pattern 0(there is no changes) appeared in all subjects, and pattern 4(this indicate the trace of glottal fry and closure in spectrogram)was only in a Stutterer. In high vowels(/i/, /u/), pattern 3 and 4 appeared only in a stutterer. Although there is no common pattern among the non-stutterers, individual's preference pattern was founded. This study offers the key to an understanding of physiological movement on a block of stutter.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.1
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• pp.60-66
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• 2000

This paper proposes a design of phone card IC with the self-test features and the hardware and software security functions. We design and verify the proposed functions with modeling the terminal system environment. The proposed phone card IC provides instructions and a non-volatile memory block containing the manufacturer / issuer / user information, the unit (money) value, and the security key. The self-test functions are designed to improve the test time degradation due to a serial I/O communication. Also some security features are implemented using hardware and software approaches.

• International Journal of Safety
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• v.7 no.1
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• pp.1-4
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• 2008

Application of the Microsoft robotics studio (MSRS) to the design of a factory safety monitoring robot is presented. Basic structures of the MSRS and the service are introduced. The service is the key building block of the MSRS. Control of the safety monitoring robot is performed using four basic services: 1) the robot service which communicates with the embedded micro-processor and other services, 2) the sensor service that notifies the subscribing services of the change of the sensor value, 3) the motor service which controls the power levels to the motors, 4) the drive service which maneuvers the robot. With built-in capabilities of the MSRS, control of factory safety monitoring robot can be more easily performed.

• Journal of the Korean Association of Oral and Maxillofacial Surgeons
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• v.34 no.2
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• pp.200-206
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• 2008

A variety of mechanisms may generate pain resulting from injury to the peripheral nervous system. None of these mechanisms is disease-specific, and several different pain mechanisms may be present simultaneously in any one patient. Diagnosis of neuropathic pain is often easily made from the information gathered on neurologic examination and from patient history. Evidence of sensory disturbances elicited by examination combined with laboratory tests confirming injury to peripheral nerve establishes the diagnosis of neuropathic pain. Although treatment of neuropathic pain may be difficult, optimum treatment can be achieved if dentist has a complete understanding of the therapeutic options. Pharmacologic therapy has been the mainstay of treatment. Selection of an appropriate pharmacologic agent is by trial and error since individual response to different agents, doses, and serum level are highly variable. An adequate trial for each agent tried is key to pharmacologic treatment of neuripathic pain. If pharmacologic treatment is not effective, nerve block using lidocaine, steroid and alcohol and neurectomy must be considered for treatment option.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.9
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• pp.1652-1659
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• 2008

With the increase of huge amount of data in network systems, ultimate high-speed network has become an essential requirement. In such systems, the encryption and decryption process for security becomes a bottle-neck. For this reason, the need of hardware implementation is strongly emphasized. In this study, a mixed inner and outer round pipelining architecture is introduced to achieve high speed performance of ARIA hardware. Multiplexers are used to control the lengths of rounds for 3 types of keys. Merging of encryption module and key initialization module increases the area efficiency. The proposed hardware architecture is implemented on reconfigurable hardware, Xilinx Virtex2-pro. The hardware architecture in this study shows that the area occupied 6437 slices and 128 BRAMs, and it is translated to throughput of 24.6Gbit/s with a maximum clock frequency of 192.9MHz.

• Journal of Information Processing Systems
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• v.9 no.3
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• pp.499-510
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• 2013

Hardware-Software co-simulation of a multiple image encryption technique shall be described in this paper. Our proposed multiple image encryption technique is based on the Latin Square Image Cipher (LSIC). First, a carrier image that is based on the Latin Square is generated by using 256-bits of length key. The XOR operation is applied between an input image and the Latin Square Image to generate an encrypted image. Then, the XOR operation is applied between the encrypted image and the second input image to encrypt the second image. This process is continues until the nth input image is encrypted. We achieved hardware co-simulation of the proposed multiple image encryption technique by using the Xilinx System Generator (XSG). This encryption technique is modeled using Simulink and XSG Block set and synthesized onto Virtex 2 pro FPGA device. We validated our proposed technique by using the hardware software co-simulation method.