• Journal of the Korea Society of Computer and Information
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• v.21 no.9
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• pp.51-55
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• 2016

High-capacity, high quality services should be guaranteed in mobile communication environment. Excellent channel coding and compensation techniques are required so as to improve data reliability on fading channels. In this paper, we propose a method using double pilots, estimates and compensates for the fading of information symbols. The proposed method using Log-MAP Turbo decoder through the iterative decoder, improves BER performance under the environment of the frequency selective fading channel. Compared to the existing methods, the suggested methods show functional improvement of approximately 3dB in case that the number of iteration decoding is 5 and BER is $10^{-4}$.

• ETRI Journal
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• v.29 no.3
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• pp.363-370
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• 2007

In this paper, we propose a flexible turbo decoding algorithm for a high order modulation scheme that uses a standard half-rate turbo decoder designed for binary quadrature phase-shift keying (B/QPSK) modulation. A transformation applied to the incoming I-channel and Q-channel symbols allows the use of an off-the-shelf B/QPSK turbo decoder without any modifications. Iterative codes such as turbo codes process the received symbols recursively to improve performance. As the number of iterations increases, the execution time and power consumption also increase. The proposed algorithm reduces the latency and power consumption by combination of the radix-4, dual-path processing, parallel decoding, and early-stop algorithms. We implement the proposed scheme on a field-programmable gate array and compare its decoding speed with that of a conventional decoder. The results show that the proposed flexible decoding algorithm is 6.4 times faster than the conventional scheme.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.9C
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• pp.801-809
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• 2007

LDPC Low Density Parity Check) code, which is an error correcting code determined to be applied to the 4th generation mobile communication systems, requires a heavy computational complexity due to iterative decodings to achieve a high BER performance. This paper proposes an algorithm to reduce the number of decoding iterations to increase performance of the decoder in decoding latency and power consumption. Measuring changes between the current decoded LLR values and previous ones, the proposed algorithm predicts directions of the value changes. Based on the prediction, the algorithm inverts the sign bits of the LLR values to speed up convergence, which means parity check equation is satisfied. Simulation results show that the number of iterations has been reduced by about 33% without BER performance degradation in the proposed decoder, and the power consumption has also been decreased in proportional to the amount of the reduced decoding iterations.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.39 no.3
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• pp.125-131
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• 2002

In this paper, a new concatenation scheme of serial concatenated convolutional codes is proposed and the performance analyzed. In the proposed scheme, each of information and parity bits of outer code is entered into inner code through interleaver and deinterleaver. Therefore, the interleaver size is same as the length of input frame. Since the interleaver size of proposed type is reduced to half of the conventional Benedetto type, the interleaver delay time required for iterative decoding is reduced. In addition the multiplexer and demultiplexer are not used in the decoder of the proposed type, the complexity of decoder can be also reduced. As results of simulation, the performance of proposed type shows the better error performance as compared to that of the conventional Benedetto type in case of the same interleaver size. And it can be observed that the difference of BER performance is increased with the increase of Eb/No. In case of the same length of input frame, the proposed type shows almost same performance with Benedetto type despite that the interleaver size is reduced by half.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.11
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• pp.50-57
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• 2013

This paper provides a design of high-throughput parallel turbo decoder that is able to decode several packets of various length simultaneously. For high-speed communications, designing of Turbo decoder as parallel structures reduces the long decoding time caused by iterative turbo decode way. Also, by employing the double buffer structure for input and output packets improves the decoder throughput by enabling continuous decoding. Because parallel turbo decoder is designed to be able to decode the packet of the longest length, there exist idle PE's(Processing Element) in the case of decoding packets of short length. The main idea of this paper is to increase the utilization of PE's in parallel Turbo decoder and to improve the decoder throughput by using the idle PE's immediately for the subsequent packets decoding. For this, the control is necessary to enable the concurrent decoding of several short packets and we propose the method of this control. Applying the proposed method, we implemented Turbo Decoder with 32 PE's that can decode packets of 6144 bits maximum. Compared to the conventional Turbo decoder, although the area was increased about 16%, the decoder throughput was improved 28 times for short packets.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.4
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• pp.160-172
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• 2014

Although Wyner-Ziv (WZ) video coding proves useful for applications employing encoders having restricted computing resources, the WZ decoder has a problem of excessive decoding complexity. It is mainly due to its iterative LDPC channel decoding process which repeatedly requests incremental parity data after iterative channel decoding of parity data received at each request. In order to solve the complexity problem, we divide bit planes into two groups and estimate the minimum required number of parity requests separately for the two groups of bit planes using bit plane correlation. The WZ decoder executes the iterative decoding process only after receiving parity data corresponding to the estimated minimum number of parity requests. The proposed method saves about 71% of the computing time in the LDPC decoding process.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.7C
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• pp.611-617
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• 2010

In this paper, we investigate the performances of the serial concatenated convolutional codes (SCCC) and low-density parity-check (LDPC) codes on perpendicular magnetic recording (PMR) channels. We discuss the performance of two systems when user bit-densities are 1.7, 2.0, 2.4 and 2.8, respectively. The SCCC system is less complex than LDPC system. The SCCC system consists of recursive systematic convolutional (RSC) codes encoder/decoder, precoder and random interleaver. The decoding algorithm of the SCCC system is the soft message-passing algorithm and the decoding algorithm of the LDPC system is the log domain sum-product algorithm (SPA). When we apply the iterative decoding between channel detector and the error control codes (ECC) decoder, the SCCC system is compatible with the LDPC system even at the high user bit density.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.2
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• pp.385-391
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• 2007

In this paper, we propose and observe the Adaptive Modulation system with optimal Turbo Coded V-BLAST (Vertical-Bell-lab Layered Space-Time) technique that is applied the extrinsic information from MAP (Maximum A Posteriori) Decoder with Iterative Decoding to use as a priori probability in two decoding procedures of V-BLAST: ordering and slicing. Also, comparing with the Adaptive Modulation system using conventional Turbo Coded V-BLAST technique that is simply combined V-BLAST with Turbo Coding scheme, we observe how much throughput performance has been improved. As a result of simulation, in the Adaptive Modulation systems with several Turbo Coded V-BLAST techniques, the optimal Turbo Coded V-BLAST technique has higher throughput gain than the conventional Turbo Coded V-BLAST technique. Especially, the results show that the proposed scheme achieves the gain of 1.5 dB SNR compared to the conventional system at 2.5 Mbps throughput.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.2A
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• pp.172-178
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• 2011

In this paper, the performance of bit interleaved of coded and modulation(BICM) module of the second generation of digital terrestrial television broadcasting system(DVB-T2) is evaluated with the help of computer simulation. The frame error rate performance is studied in AWGN, Rayleigh fading and 15% erasure channels. In addition, iterative receiver is considered that exchanges extrinsic information between the rotated demapper and the LDPC decoder. Through the simulation it is observed that under the flat fading Rayleigh channel, about 1.2dB gain at FER of $10^{-4}$ is introduced when rotated constellation and iterative demapping and decoding are employed. Under the 15% earasure channel, rotated constellation gives performance gain of about 5dB at BER of $10^{-4}$ and when IDD is applied, additional performance gain of about 3dB can be achieved.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.11C
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• pp.1108-1115
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• 2005

In this paper, we propose a practical iterative channel estimation and decoding method for an LDPC-coded frequency hopping OFDMA system in the uplink of a packet-based cellular system. In the method, the channel gain and noise variance are iteratively estimated with both pilot symbols and LDPC decoder outputs to provide more reliable decoding metrics in intercell interference (ICI) environments. In addition, the channel correlation coefficient is also estimated to select proper filter coefficients according to the channel variation rate. Through simulations under the various channel conditions and different receiver configurations, it is shown that the proposed iterative receiver improves the performance without boosting the pilot power and mitigates the adverse effects of the non-uniform ICI.