• ETRI Journal
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• 제28권6호
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• pp.790-792
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• 2006

The performance of a turbo decoder depends strongly on the number of iterations in its decoding process. It is necessary to stop the decoding process at an appropriate moment to alleviate the serious burden, in terms of both the computational speed and latency, part of which is associated with too many iterations. In this letter, we introduce a criterion for finding the opportune moment to stop the decoding process, called a hard decision aided criterion based on bit interleaved parity, which is known to have much simpler hardware logic, compared with other schemes, and does not lead to any significant performance degradation.

• 한국통신학회논문지
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• 제31권12C호
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• pp.1143-1149
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• 2006

본 논문에서는 체크 노드 분할을 이용한 변형된 반복 복호 방법 [8]을 IEEE 802.16e 표준에서 제시된 low-density parity-check(LDPC) 부호에 적용하여 복호의 수렴 속도 개선을 확인한다 또한 IEEE 802.16e에서 제시된 LDPC 부호에 가장 적합한 체크 노드 분할 방법을 제안한다. 수렴 속도 개선은 반복 횟수를 줄일 수 있다는 의미에서 계산 복잡도를 감소시킬 수 있다. 이러한 체크 노드 분할을 이용한 복호 방법은 복호기의 하드웨어 구현이 병렬 처리 방식으로 구현되기 어려운 시스템에서 효과적인 직렬 처리 방식으로 적용될 수 있다. 제시된 LDPC 부호의 변형된 반복 복호 방법은 무선 통신 시스템 환경의 실제 복호기를 구현하는데 사용될 수 있다.

• 한국시뮬레이션학회논문지
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• 제14권4호
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• pp.87-93
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• 2005

In this paper we propose a new iterative decoding method of turbo code which computes the log-likelihood ratios at each MAP (maximum a posteriori) decoder in parallel in each iteration step and combines them with proper weights to produce better decisions. Our results indicate that the proposed decoding method is particularly useful for systems with limited number of iterations and low code rates.

• 한국통신학회논문지
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• 제35권2C호
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• pp.139-147
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• 2010

본 논문에서는 deep-space 광통신을 위한 터보 부호화 변조 기법을 설계한다. 설계한 기법의 송신 단에서는 터보 부호기와 누적기, 펄스 위치 변조기(PPM)를 연접한 구조를 사용하고, 수신 단에서는 터보 부호 자체의 복호를 위한 반복 복호와 연접 부호 간의 반복 복호를 동시에 사용하는 복호 기법을 제시한다. 광통신 채널로는 이상적인 광자 직접 검파기를 사용하는 경우를 가정하여 Poisson 채널을 사용한다. 컴퓨터 모의실험을 통해, 설계한 기법이 기존에 광통신 부호화 변조 기법으로 제시되었던 LDPC-APPM, RS-PPM, SCPPM 등 보다 우월한 성능을 보임을 확인할 수 있다.

• 한국통신학회논문지
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• 제33권4A호
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• pp.426-433
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• 2008

In this paper, we present a method to improve the performance of the four transmit antenna quasi-orthogonal space-time block code (STBC) in the coded system. For the four transmit antenna case, the quasi-orthogonal STBC consists of two symbol groups which are orthogonal to each other, but intra group symbols are not. In uncoded system with the matched filter detection, constellation rotation can improve the performance. However, in coded systems, its gain is absorbed by the coding gain especially for lower rate code. We propose an iterative decoding method to improve the performance of quasi-orthogonal codes in coded systems. With conventional quasi-orthogonal STBC detection, the joint ML detection can be improved by iterative processing between the demapper and the decoder. Simulation results shows that the performance improvement is about 2dB at 1% frame error rate.

• Journal of electromagnetic engineering and science
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• 제6권3호
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• pp.147-154
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• 2006

In this paper, we propose and present implementation results of a high-speed turbo decoding algorithm. The latency caused by (de) interleaving and iterative decoding in a conventional maximum a posteriori(MAP) turbo decoder can be dramatically reduced with the proposed design. The source of the latency reduction is come from the combination of the radix-4, dual-path processing, parallel decoding, and rearly-stop algorithms. This reduced latency enables the use of the turbo decoder as a forward error correction scheme in real-time wireless communication services. The proposed scheme results in a slight degradation in bit-error rate(BER) performance for large block sizes because the effective interleaver size in a radix-4 implementation is reduced to half, relative to the conventional method. Fixed on the parameters of N=212, iteration=3, 8-states, 3 iterations, and QPSK modulation scheme, we designed the adaptive high-speed turbo decoder using the Xilinx chip (VIRTEX2P (XC2VP30-5FG676)) with the speed of 17.78 Mb/s. From the results, we confirmed that the decoding speed of the proposed decoder is faster than conventional algorithms by 8 times.

• 방송공학회논문지
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• 제16권6호
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• pp.1026-1035
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• 2011

본 논문은 기존 블록 터보 부호의 SISO(Soft-input Soft-output) 기반 반복 복호 알고리즘의 일반화 및 활용에 대한 연구를 다루고 있다. R. M. Pyndiah는 AWGN 채널(Additive White Gaussian Noise Channel)에서 2차원 Linear Block Code(선형 블록 부호, LBC) 결합으로 구성된 Product 부호의 SISO 반복 복호 방식을 제안했으며, 이를 블록 터보 부호라 하였다. 블록 터보 부호의 SISO 복호방식은 SIHO(Soft-input Hard-output) 복호 방식인 Chase 알고리즘의 부호 판정을 기반으로 연판정 정보를 생성 후 전달하여 반복적인 복호를 수행한다. 블록 터보 부호는 AWGN 채널에서 높은 Code-rate(부호율)의 Product 부호에 대해 적은 SISO 복호 반복만으로도 샤논 한계에 근접하는 우수한 성능을 보여준다. 본 논문에서는 BPSK(Binary Phase Shift Keying) 변조와 AWGN 채널 전송을 가정한 기존 블록 터보 부호 복호 알고리즘을 채널 출력의 LLR(Log-likelihood Ratio)에 기반한 알고리즘으로 일반화하고, LDPC(Low-density Parity Check) 부호와 블록 터보 부호의 직렬 결합 구조에서 일반화된 알고리즘 활용 예를 제시한다.

• 대한전기학회논문지:시스템및제어부문D
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• 제50권8호
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• pp.400-405
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• 2001

Quadrature Amplitude Modulation(QAM) is well known a bandwidth efficient modulation scheme. However, its use for mobile communications has been limited due to noise and signal distortion. Recently, the QAM scheme is emerging as a new modulation scheme for a band-limited wireless system. In this paper, we propose an iterative decoding algorithm assuming QAM signal for a narrow-band mobile channel. The Algorithm is based on the EM(Expectation Maximization) Algorithm, and the performances of the proposed decoder are assessed using computer simulation. The simulation results show that the proposed decoder perform better compared to that of other schemes.

• 한국통신학회논문지
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• 제30권6C호
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• pp.450-456
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• 2005

In this paper, we propose a high-speed turbo decoding algorithm and present results of its implementation. The latency caused by (de)interleaving and iterative decoding in conventional MAP turbo decoder can be dramatically reduced with the proposed scheme. The main cause of the time reduction is to use radix-4, center to top, and parallel decoding algorithm. The reduced latency makes it possible to use turbo decoder as a FEC scheme in the real-time wireless communication services. However the proposed scheme costs slight degradation in BER performance because the effective interleaver size in radix-4 is reduced to an half of that in conventional method. To ensure the time reduction, we implemented the proposed scheme on a FPGA chip and compared with conventional one in terms of decoding speed. The decoding speed of the proposed scheme is faster than conventional one at least by 5 times for a single iteration of turbo decoding.

• ETRI Journal
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• 제37권4호
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• pp.736-742
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• 2015

A serial concatenated decoding algorithm with dynamic threshold is proposed for low-density parity-check codes with short and medium code lengths. The proposed approach uses a dynamic threshold to select a decoding result from belief propagation decoding and order statistic decoding, which improves the performance of the decoder at a negligible cost. Simulation results show that, under a high SNR region, the proposed concatenated decoder performs better than a serial concatenated decoder without threshold with an Eb/N0 gain of above 0.1 dB.