• 제목/요약/키워드: inverted-staggered

검색결과 45건 처리시간 0.023초

Inverted Staggered-Type 비정질 실리콘 박막트랜지스터의 수치적 분석 (Numerical Analysis of Inverted Staggered-Type Hydrogenated Amorphous Silicon Thin Film Transistor)

  • 오창호;박진석;한민구
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1990년도 추계학술대회 논문집 학회본부
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    • pp.93-96
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    • 1990
  • The characteristics of an inverted staggered-type hydrogenated amorphous silicon thin film transistor has been analyzed by employing numerical simulation. The field effect mobility and threshold voltage are characterized as a function of density of deep and tail states and lattice temperature. It has been found that the density of deep states plays an important role of determining the threshold voltage, while the field effect mobility are very sensitive to the slope of band tail states. Also, the numerically temperature dependence of field effect mobility and threshold voltage has been in good agreements with the experimental results.

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Staggered and Inverted Staggered Type Organic-Inorganic Hybrid TFTs with ZnO Channel Layer Deposited by Atomic Layer Deposition

  • Gong, Su-Cheol;Ryu, Sang-Ouk;Bang, Seok-Hwan;Jung, Woo-Ho;Jeon, Hyeong-Tag;Kim, Hyun-Chul;Choi, Young-Jun;Park, Hyung-Ho;Chang, Ho-Jung
    • 마이크로전자및패키징학회지
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    • 제16권4호
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    • pp.17-22
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    • 2009
  • Two different organic-inorganic hybrid thin film transistors (OITFTs) with the structures of glass/ITO/ZnO/PMMA/Al (staggered structure) and glass/ITO/PMMA/ZnO/Al (inverted staggered structure), were fabricated and their electrical and structural properties were compared. The ZnO thin films used as active channel layers were deposited by the atomic layer deposition (ALD) method at a temperature of $100^{\circ}C$. To investigate the effect of the substrates on their properties, the ZnO films were deposited on bare glass, PMMA/glass and ITO/glass substrates and their crystal properties and surface morphologies were analyzed. The structural properties of the ZnO films varied with the substrate conditions. The ZnO film deposited on the ITO/glass substrate showed better crystallinity and morphologies, such as a higher preferred c-axis orientation, lower FWHM value and larger particle size compared with the one deposited on the PMMA/glass substrate. The field effect mobility ($\mu$), threshold voltage ($V_T$) and $I_{on/off}$ switching ratio for the OITFT with the staggered structure were about $0.61\;cm^2/V{\cdot}s$, 5.5 V and $10^2$, whereas those of the OITFT with the inverted staggered structure were found to be $0.31\;cm^2/V{\cdot}s$, 6.8 V and 10, respectively. The improved electrical properties for the staggered OITFTs may originate from the improved crystal properties and larger particle size of the ZnO active layer.

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인버티드 스태거형 TFT 캐패시턴스의 온도변화 특성 (Temperature Variation Capacitance Characteristics of Inverted Staggered TFT)

  • 정용호;이우선;김남오
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1996년도 춘계학술대회 논문집
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    • pp.102-104
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    • 1996
  • The fabrication and analytical expression for the temperature dependent capacitance characteristics of inverted staggered hydrogenerated amorphous silicon thin film transistors(a-si :H TFT) from 303k to 363k were presented. The results show that the experimental capacitance-voltage characteristics at several temperatures are easily measured. Capacitance increased exponentially by gate voltage increase and decreased by temperature increase. C/C(max) ratio decreased at higher temperature, C/C(min) ratio increased at higher temperature.

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이차원 소자 시뮬레이터를 이용한 역 스태거형 비정질 실리콘 박막 트랜지스터의 구조 최적화 (Structure Optimization of Inverted-Staggered a-Si TFT Using a Two-Dimensional Device Simulator)

  • 곽지훈;최종선
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1997년도 하계학술대회 논문집 C
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    • pp.1349-1351
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    • 1997
  • TFT2DS was utilized to provide the usefulness as an analytic and design tool. In this paper, the general effects of channel length of an inverted staggered amorphous silicon thin film transistor on its characteristics were investigated. The results obtained from these experiments would be adopted to the optimized device designs and advanced simulations of their electrical properties.

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CVD증착에 의한 인버티드 스태거형 TFT의 전압 전류 특성 (Current and voltage characteristics of inverted staggered type amorphous silicon thin film transistor by chemical vapour deposition)

  • 이우선;박진성;이종국
    • E2M - 전기 전자와 첨단 소재
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    • 제9권10호
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    • pp.1008-1012
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    • 1996
  • I-V, C-V characteristics of inverted staggered type hydrogenerated amorphous silicon thin film transistor(a-Si:H TFT) was studied and experimentally verified. The results show that the log-log plot of drain current increased by voltage increase. The saturated drain current of DC output characteristics increased at a fixed gate voltage. According to the increase of gate voltage, activation energy of electron and the increasing width of Id at high voltage were decreased. Id saturation current saturated at high Vd over 4.5V, Vg-ld hysteresis characteristic curves occurred between -15V and 15V of Vg. Hysteresis current decreased at low voltage of -15V and increased at high voltage of 15V.

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수소 플라즈마 처리를 이용한 역스테거드형 펜타센 트랜지스터의 전기적 특성 향상에 대한 연구 (Study on the Electrical Characterization of Inverted Staggered Pentacene Thin Film Transistor using Hydrogen Plasma Treatment)

  • 장재원;이주원;김재경;김영철;주병권
    • 한국전기전자재료학회논문지
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    • 제16권11호
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    • pp.961-968
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    • 2003
  • In order to reach the high electrical quality of organic thin film transistors (OTFTs) such as high mobility and on-off current ratio, it is strongly desirable to study the enhancement of electrical properties in OTFTs. Here, we report the novel method of hydrogen plasma treatment to improve electrical properties in inverted staggered OTFTs based on pentacene as active layer. To certify the effect of this method, we compared the electrical properties of normal device as a reference with those of device using the novel method. In result, the normal device as a reference making no use of this method exhibited a field effect mobility of 0.055 $\textrm{cm}^2$/Vs, on/off current ratio of 10$^3$, threshold voltage of -4.5 V, and subthreshold slope of 7.6 V/dec. While the device using the novel method exhibited a field effect mobility of 0.174 $\textrm{cm}^2$/Vs, on/off current ratio of 10$\^$6/, threshold voltage of -0.5 V, and subthreshold slope of 1.49 V/dec. According to these results, we have found the electrical performances in inverted staggered pentacene TFT owing to this method are remarkably enhanced. So, this method plays a key role in highly improving the electric performance of OTFTs. Moreover, this method is the first time yet reported for any OTFTs.

비정질 실리콘 박막 트랜지스터의 2차원적 수치 해석 (2-Dimensional Numerical Simulation of Inverted-staggered type Amorphous Silicon TFT)

  • 주인수;한민구
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1991년도 추계학술대회 논문집 학회본부
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    • pp.257-260
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    • 1991
  • The current-voltage characteristics of inverted-ataggered type a-Si TFT has been successfully obtained by 2-D simulation using Finite Difference Method. Potential and charge distibutions in a-Si TFT's has been calculated by considering localized states in the forbidden gap. The results of numerical simulation have good agreement with the our experimental data.

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Properties of Thin Film a-Si:H and Poly-Si TFT's

  • 안병재;김도영;유진수;이준신
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2000년도 춘계학술대회 논문집 디스플레이 광소자 분야
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    • pp.169-172
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    • 2000
  • A-Si:H and poly-Si TFT characteristics were investigated using an inverted staggered type TFT. The poly-Si films were achieved by various anneal techniques ; isothermal, RTA, and excimer laser anneal. The TFT on as-grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. Some films were annealed at temperatures from $200^{\circ}C$ to $1000^{\circ}C$. The TFT on poly-Si showed an improved $I_{on}/I_{off}$ ratio of $10^6$, reduced gate threshold voltage, and increased field effect mobility by three orders. Inverter operation was examined to verify logic circuit application using the poly-Si TFTs.

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강휴태차(剛休台車)와 비틀림 응답형태차(答型台車)의 제어특성(制御特性) (Controll Characteristics of Electromagnetically Levitated Rigid Body Bogie-Truck and Twist Response Type of Bogie-Truck)

  • 권병일;정전영개
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1989년도 하계종합학술대회 논문집
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    • pp.142-145
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    • 1989
  • The electromagnetic suspension system, which is a kind of magnetic levitation, can be categorized into two groups; separate lift & guidance system and combined lift & guidance system. This paper deals with the latter system, in which lift and guidance forces are generated by a pair of staggered magnets with the inverted U- shaped rail. In this work, a rigid body bogie-truck and a twist response type of bogie-truck, which are constructed by two magnetic wheels consist of two staggered magnet pairs, are modeled, and curvature running characteristics of both types obtained by simulation are presented. Simulation result showed that curvature running characteristics of twist response type of bogie-truck is better than that of rigid body bogie-truck.

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박막트랜지스터의 습식 및 건식 식각 공정 (The Wet and Dry Etching Process of Thin Film Transistor)

  • 박춘식;허창우
    • 한국정보통신학회논문지
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    • 제13권7호
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    • pp.1393-1398
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    • 2009
  • 본 연구는 LCD용 비정질 실리콘박막트랜지스터의 제조공정중 가장 중요한 식각 공정에서 각 박막의 특성에 맞는 습식 및 건식식각공정을 개발하여 소자의 특성을 안정시키고자 한다. 본 연구의 수소화 된 비정질 실리콘 박막 트랜지스터는 Inverted Staggered 형태로 게이트 전극이 하부에 있다. 실험 방법은 게이트전극, 절연층, 전도층, 에치스토퍼 및 포토레지스터층을 연속 증착한다. 스토퍼층을 게이트 전극의 패턴으로 남기고, 그 위에 n+a-Si:H 층 및 NPR(Negative Photo Resister)을 형성시킨다. 상부 게이트 전극과 반대의 패턴으로 NPR층을 패터닝하여 그것을 마스크로 상부 n+a-Si:H 층을 식각하고, 남아있는 NPR층을 제거 한다. 그 위 에 Cr층을 증착한 후 패터닝 하여 소오스-드레인 전극을 위한 Cr층을 형성시켜 박막 트랜지스터를 제조한다. 여기서 각 박막의 패터닝은 식각 공정으로 각단위 박막의 특성에 맞는 건식 및 습식식각 공정이 필요하다. 제조한 박막 트랜지스터에서 가장 흔히 발생되는 문제는 주로 식각 공정시 over 및 under etching 이며, 정확한 식각을 위하여 각 박막에 맞는 식각공정을 개발하여 소자의 최적 특성을 제공하고자한다. 이와 같이 공정에 보다 엄격한 기준의 건식 및 습식식각 공정 그리고 세척 등의 처리공정을 정밀하게 실시하여 소자의 특성을 확실히 개선 할 수 있었다.