• Title/Summary/Keyword: inverted-staggered

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Numerical Analysis of Inverted Staggered-Type Hydrogenated Amorphous Silicon Thin Film Transistor (Inverted Staggered-Type 비정질 실리콘 박막트랜지스터의 수치적 분석)

  • Oh, Chang-Ho;Park, Jin-Seok;Han, Min-Koo
    • Proceedings of the KIEE Conference
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    • 1990.11a
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    • pp.93-96
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    • 1990
  • The characteristics of an inverted staggered-type hydrogenated amorphous silicon thin film transistor has been analyzed by employing numerical simulation. The field effect mobility and threshold voltage are characterized as a function of density of deep and tail states and lattice temperature. It has been found that the density of deep states plays an important role of determining the threshold voltage, while the field effect mobility are very sensitive to the slope of band tail states. Also, the numerically temperature dependence of field effect mobility and threshold voltage has been in good agreements with the experimental results.

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Staggered and Inverted Staggered Type Organic-Inorganic Hybrid TFTs with ZnO Channel Layer Deposited by Atomic Layer Deposition

  • Gong, Su-Cheol;Ryu, Sang-Ouk;Bang, Seok-Hwan;Jung, Woo-Ho;Jeon, Hyeong-Tag;Kim, Hyun-Chul;Choi, Young-Jun;Park, Hyung-Ho;Chang, Ho-Jung
    • Journal of the Microelectronics and Packaging Society
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    • v.16 no.4
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    • pp.17-22
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    • 2009
  • Two different organic-inorganic hybrid thin film transistors (OITFTs) with the structures of glass/ITO/ZnO/PMMA/Al (staggered structure) and glass/ITO/PMMA/ZnO/Al (inverted staggered structure), were fabricated and their electrical and structural properties were compared. The ZnO thin films used as active channel layers were deposited by the atomic layer deposition (ALD) method at a temperature of $100^{\circ}C$. To investigate the effect of the substrates on their properties, the ZnO films were deposited on bare glass, PMMA/glass and ITO/glass substrates and their crystal properties and surface morphologies were analyzed. The structural properties of the ZnO films varied with the substrate conditions. The ZnO film deposited on the ITO/glass substrate showed better crystallinity and morphologies, such as a higher preferred c-axis orientation, lower FWHM value and larger particle size compared with the one deposited on the PMMA/glass substrate. The field effect mobility ($\mu$), threshold voltage ($V_T$) and $I_{on/off}$ switching ratio for the OITFT with the staggered structure were about $0.61\;cm^2/V{\cdot}s$, 5.5 V and $10^2$, whereas those of the OITFT with the inverted staggered structure were found to be $0.31\;cm^2/V{\cdot}s$, 6.8 V and 10, respectively. The improved electrical properties for the staggered OITFTs may originate from the improved crystal properties and larger particle size of the ZnO active layer.

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Temperature Variation Capacitance Characteristics of Inverted Staggered TFT (인버티드 스태거형 TFT 캐패시턴스의 온도변화 특성)

  • 정용호;이우선;김남오
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1996.05a
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    • pp.102-104
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    • 1996
  • The fabrication and analytical expression for the temperature dependent capacitance characteristics of inverted staggered hydrogenerated amorphous silicon thin film transistors(a-si :H TFT) from 303k to 363k were presented. The results show that the experimental capacitance-voltage characteristics at several temperatures are easily measured. Capacitance increased exponentially by gate voltage increase and decreased by temperature increase. C/C(max) ratio decreased at higher temperature, C/C(min) ratio increased at higher temperature.

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Structure Optimization of Inverted-Staggered a-Si TFT Using a Two-Dimensional Device Simulator (이차원 소자 시뮬레이터를 이용한 역 스태거형 비정질 실리콘 박막 트랜지스터의 구조 최적화)

  • Kwak, Ji-Hoon;Choi, Jong-Sun
    • Proceedings of the KIEE Conference
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    • 1997.07d
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    • pp.1349-1351
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    • 1997
  • TFT2DS was utilized to provide the usefulness as an analytic and design tool. In this paper, the general effects of channel length of an inverted staggered amorphous silicon thin film transistor on its characteristics were investigated. The results obtained from these experiments would be adopted to the optimized device designs and advanced simulations of their electrical properties.

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Current and voltage characteristics of inverted staggered type amorphous silicon thin film transistor by chemical vapour deposition (CVD증착에 의한 인버티드 스태거형 TFT의 전압 전류 특성)

  • 이우선;박진성;이종국
    • Electrical & Electronic Materials
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    • v.9 no.10
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    • pp.1008-1012
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    • 1996
  • I-V, C-V characteristics of inverted staggered type hydrogenerated amorphous silicon thin film transistor(a-Si:H TFT) was studied and experimentally verified. The results show that the log-log plot of drain current increased by voltage increase. The saturated drain current of DC output characteristics increased at a fixed gate voltage. According to the increase of gate voltage, activation energy of electron and the increasing width of Id at high voltage were decreased. Id saturation current saturated at high Vd over 4.5V, Vg-ld hysteresis characteristic curves occurred between -15V and 15V of Vg. Hysteresis current decreased at low voltage of -15V and increased at high voltage of 15V.

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Study on the Electrical Characterization of Inverted Staggered Pentacene Thin Film Transistor using Hydrogen Plasma Treatment (수소 플라즈마 처리를 이용한 역스테거드형 펜타센 트랜지스터의 전기적 특성 향상에 대한 연구)

  • 장재원;이주원;김재경;김영철;주병권
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.11
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    • pp.961-968
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    • 2003
  • In order to reach the high electrical quality of organic thin film transistors (OTFTs) such as high mobility and on-off current ratio, it is strongly desirable to study the enhancement of electrical properties in OTFTs. Here, we report the novel method of hydrogen plasma treatment to improve electrical properties in inverted staggered OTFTs based on pentacene as active layer. To certify the effect of this method, we compared the electrical properties of normal device as a reference with those of device using the novel method. In result, the normal device as a reference making no use of this method exhibited a field effect mobility of 0.055 $\textrm{cm}^2$/Vs, on/off current ratio of 10$^3$, threshold voltage of -4.5 V, and subthreshold slope of 7.6 V/dec. While the device using the novel method exhibited a field effect mobility of 0.174 $\textrm{cm}^2$/Vs, on/off current ratio of 10$\^$6/, threshold voltage of -0.5 V, and subthreshold slope of 1.49 V/dec. According to these results, we have found the electrical performances in inverted staggered pentacene TFT owing to this method are remarkably enhanced. So, this method plays a key role in highly improving the electric performance of OTFTs. Moreover, this method is the first time yet reported for any OTFTs.

2-Dimensional Numerical Simulation of Inverted-staggered type Amorphous Silicon TFT (비정질 실리콘 박막 트랜지스터의 2차원적 수치 해석)

  • Joo, In-Su;Han, Min-Koo
    • Proceedings of the KIEE Conference
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    • 1991.11a
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    • pp.257-260
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    • 1991
  • The current-voltage characteristics of inverted-ataggered type a-Si TFT has been successfully obtained by 2-D simulation using Finite Difference Method. Potential and charge distibutions in a-Si TFT's has been calculated by considering localized states in the forbidden gap. The results of numerical simulation have good agreement with the our experimental data.

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Properties of Thin Film a-Si:H and Poly-Si TFT's

  • Ahn, Byeong-Jae;Kim, Do-Young;Yoo, Jin-Su;Yi, Jun-Sin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.04a
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    • pp.169-172
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    • 2000
  • A-Si:H and poly-Si TFT characteristics were investigated using an inverted staggered type TFT. The poly-Si films were achieved by various anneal techniques ; isothermal, RTA, and excimer laser anneal. The TFT on as-grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. Some films were annealed at temperatures from $200^{\circ}C$ to $1000^{\circ}C$. The TFT on poly-Si showed an improved $I_{on}/I_{off}$ ratio of $10^6$, reduced gate threshold voltage, and increased field effect mobility by three orders. Inverter operation was examined to verify logic circuit application using the poly-Si TFTs.

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Controll Characteristics of Electromagnetically Levitated Rigid Body Bogie-Truck and Twist Response Type of Bogie-Truck (강휴태차(剛休台車)와 비틀림 응답형태차(答型台車)의 제어특성(制御特性))

  • Kwon, B.I.;Masada, E.
    • Proceedings of the KIEE Conference
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    • 1989.07a
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    • pp.142-145
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    • 1989
  • The electromagnetic suspension system, which is a kind of magnetic levitation, can be categorized into two groups; separate lift & guidance system and combined lift & guidance system. This paper deals with the latter system, in which lift and guidance forces are generated by a pair of staggered magnets with the inverted U- shaped rail. In this work, a rigid body bogie-truck and a twist response type of bogie-truck, which are constructed by two magnetic wheels consist of two staggered magnet pairs, are modeled, and curvature running characteristics of both types obtained by simulation are presented. Simulation result showed that curvature running characteristics of twist response type of bogie-truck is better than that of rigid body bogie-truck.

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The Wet and Dry Etching Process of Thin Film Transistor (박막트랜지스터의 습식 및 건식 식각 공정)

  • Park, Choon-Sik;Hur, Chang-Wu
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.7
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    • pp.1393-1398
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    • 2009
  • Conventionally, etching is first considered for microelectronics fabrication process and is specially important in process of a-Si:H thin film transistor for LCD. In this paper, we stabilize properties of device by development of wet and dry etching process. The a-Si:H TFTs of this paper is inverted staggered type. The gate electrode is lower part. The gate electrode is formed by patterning with length of 8 ${\mu}$m${\sim}$16 ${\mu}$m and width of 80${\sim}$200 ${\mu}$m after depositing with gate electrode (Cr) 1500 ${\AA}$under coming 7059 glass substrate. We have fabricated a-SiN:H, conductor, etch-stopper and photo resistor on gate electrode in sequence, respectively. The thickness of these thin films is formed with a-SiN:H (2000 ${\mu}$m), a-Si:H(2000 ${\mu}$m) and n+a-Si:H (500 ${\mu}$m), We have deposited n-a-Si:H, NPR(Negative Photo Resister) layer after forming pattern of Cr gate electrode by etch-stopper pattern. The NPR layer by inverting pattern of upper gate electrode is patterned and the n+a-Si:H layer is etched by the NPR pattern. The NPR layer is removed. After Cr layer is deposited and patterned, the source-drain electrode is formed. In the fabricated TFT, the most frequent problems are over and under etching in etching process. We were able to improve properties of device by strict criterion on wet, dry etching and cleaning process.