• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.6
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• pp.130-136
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• 2016

HEVC (High Efficiency Video Coding) extension considers screen content as one of its main candidate sources for encoding. Among the tools already included in HEVC version 1, the technique of using transform skip mode allows transform to be skipped and to perform quantization process only. It is known to improve video coding efficiency for screen contents which are characterized to have much high frequency energy. But encoding complexity increases since its encoder should decide whether transform should be used or not in each $4{\times}4$ transform block. Based on statistical correlation between IBC (Intra block copy) and transform skip modes both of which are known effective in screen contents, this paper proposes a combined method of the fast transform skip mode decision and a modified transform skip signaling which signals transform_skip_flag at CU level as a representative transform skip signal. By simulation, the proposed method is shown to reduce encoding time of $4{\times}4$ transform blocks by about 32%.

• Journal of Broadcast Engineering
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• v.14 no.5
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• pp.551-560
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• 2009

This paper proposes a method for efficient lossless depth map coding for MPEG 3D-Video coding. In general, the conventional video coding method such as H.264 has been used for depth map coding. However, the conventional video coding methods do not consider the image characteristics of the depth map. Therefore, as a lossless depth map coding method, this paper proposes a bit-plane based lossless depth mar coding method by using the MPEG-4 Part 2 shape coding scheme. Simulation results show that the proposed method achieves the compression ratios of 28.91:1. In intra-only coding, proposed method reduces the bitrate by 24.84% in comparison with the JPEG-LS scheme, by 39.35% in comparison with the JPEG-2000 scheme, by 30.30% in comparison with the H.264(CAVLC mode) scheme, and by 16.65% in comparison with the H.264(CABAC mode) scheme. In addition, in intra and inter coding the proposed method reduces the bitrate by 36.22% in comparison with the H.264(CAVLC mode) scheme, and by 23.71% in comparison with the 0.264(CABAC mode) scheme.

• Smart Media Journal
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• v.2 no.2
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• pp.28-32
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• 2013

In this paper, we present a method to reduce complexity of depth modeling modes (DMM) that are used in the current 3D-HEVC standardization. DMM adds four modes to the existing HEVC intra prediction modes for accurate object edge representation in the depth map. Especially, Mode 3 requires distortion calculation of numerous pre-defined wedgelets, inducing high complexity. The proposed method employs absolute differences of neighboring pixels in the sides of the reference block to find high intensity changing positions. Based on such positions, the number of wedgelet candidates is reduced to six and distortion calculation is skipped for irrelevant wedgelets. Experimental results show complexity reduction by 3.1% on average, while maintaining similar coding performance.

• Journal of Broadcast Engineering
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• v.10 no.1 s.26
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• pp.77-82
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• 2005

We propose a highly Integrated motion estimation processor (MEP) for efficient video compression in an SoC platform. When compressing video by the standards like MPEG-4 and H.263, the macroblock related functions motion compensation. mode decision, motion vector prediction, and motion vector difference calculation require the frequent intervention of MCU. Thus the proposed MEP incorporates those functions with the motion estimation capability to reduce the number of interrupts to MCU, which can lead to a highly efficient SoC system. For low-power consumption, the proposed MEP can prevent the temporally static area from motion estimation or can skip the half-pel motion estimation for those macroblocks whose modes are decided as INTRA.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.112-115
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• 2008

In this paper, we propose H.264 High Profile Encoder Intra Prediction module. This designed module can be operated in 306 cycle for one-macroblock. To verify the Encoder architecture, we developed the reference C from JM 13.2 and verified the our developed hardware using test vector generated by reference C. We adopt plan removal and SAD calculation to reduce the Hardware cost and cycle. The designed circuit can be operated in 133MHz clock system, and has 250K gate counts using TSMC 0.18um process including SRAM memory.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.45 no.5
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• pp.79-86
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• 2008

H.264/AVC is the newest international video coding standard developed by the joint ITU-T and ISO/IEC standards organizations. This newest video coding standard offers much higher coding efficiency than the H.261, H.263 and MPEG-4. But it has high computing complexity and high H/W resources wasting problem. This paper described the two unit parallel pipeline structure. This new structure comparing with standard model decreased the computing complexity of 67% and the H/W resources waste of 3%.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.12
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• pp.93-101
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• 2007

Small area and low power implementation are important requirements for various multimedia processing hardware, especially for mobile environment. This paper presents a hardware architecture of H.264/AVC Intra Prediction module aiming on small area and low power. A single arithmetic unit was shared and processed sequentially for all mode decisions and computations to predict an image frame. As a result, we could get smaller area and smaller memory size compared to other existing implementations. The proposed architecture was verified using the Altera Excalibur device, and the implemented hardware has been described in Verilog-HDL and synthesized on Samsung STD130 0.18um CMOS Standard Cell Library using Synopsys Design Compiler. The synthesis result was about 11.9K logic gates and 1078 byte internal SRAM and the maximum operating frequency was 107Mhz. It consumes 879,617 clocks to process one QCIF frame, which means it can process 121.5 QCIF$(176\times144)$ frames per second, therefore it shows that it can be used for real time H.264/AVC encoding of various multimedia applications.

• The Journal of the Korea Contents Association
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• v.16 no.10
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• pp.514-521
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• 2016

The High Efficiency Video Coding (HEVC) standard provides superior coding efficiency by utilizing highly flexible block structure and more diverse coding modes. However, rate-distortion optimization (RDO) process for the decision of optimal block size and prediction mode requires excessive computational complexity. To alleviate the computation load, this paper proposes a new moment-based fast CU size decision algorithm for intra coding in HEVC. In the proposed method, moment values are computed in each CU block to estimate the texture complexity of the block from which the decision on an additional CU splitting procedure is performed. Unlike conventional methods which are mostly variance-based approaches, the proposed method incorporates the third-order moments of the CU block in the design of the fast CU size decision algorithm, which enables an elaborate classification of CU types and thus improves the RD-performance of the fast algorithm. Experimental results show that the proposed method saves 32% encoding time with 1.1% increase of BD-rate compared to HM-10.0, and 4.2% decrease of BD-rate compared to the conventional variance-based fast algorithm.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.1B
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• pp.77-88
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• 2000

This paper presents an approach for rate control by adaptively selecting macroblock modes in video coding.The problem of rate control has been investigated by many authors where quantizer level is adjustedbased on the buffer fullness. The proposed approach is different fron the previous ones [4] id that it finds the optimal decision curve rather than finding a set of the modes. Proposed algorithm extends the coding decision options for rate control to motion/no-motion compensation as well as inter/intra decisions. Instead of having a fixed motion/no-notion compensation or inter/intra decision curve, one can utilize an adaptive decision curvebased on the characteristics of input frames so that the PSNR at a given bit rate is maximized. Therefore, the proposed approach provides better rate control than simple quantizer feedback approach interns of visual quality. The curve is obtained by utilizing simulated annealing optimization technique. Thealgorithm is implemented and simulations are compared with other approaches within H.261 video codec.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.5
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• pp.7-15
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• 2007

In wireless communication networks, single-radio single-channel architecture degrades throughput and end-to-end delay due to half-duplex transmission of wireless node and route intra interference. Also, In contention-based MAC (Medium Access Control) architecture, channel contention reduces throughput and packet collision enlarges end-to-end delay. In this paper, we use multi-radio multi-channel architecture which will make wireless node to operate in full duplex mode, and exclude route intra interference. Based on this architecture, we propose a new link metric, ccf which reflects the characteristics of a contention-based wireless link, and propose a routing path metric MCCR considering channel switching delay and route intra interference. MCCR is compared with MCR by simulation, the performance of a route established by MCCR outperforms the performance of a route by MCR in terms of throughput and end-to-end delay.